Semiconductor device having a plurality of circuit patterns on a resin insulating layer

A semiconductor device comprising:

• a metal block;
• a semiconductor element that is fixed to an upper surface of the metal block with a first joining material and in which a current flows in a longitudinal direction;
• a main terminal fixed to an upper surface of the semiconductor element with a second joining material;
• a signal terminal electrically connected to the semiconductor element;
• a mold resin that covers the semiconductor element, the first joining material, and the second joining material, and covers a part of the metal block, a part of the main terminal, and a part of the signal terminal;
• an insulating substrate disposed below the metal block, the insulating substrate comprising:
• a metal base;
• a resin insulating layer provided on the metal base;
• and
• a plurality of circuit patterns provided on the resin insulating layer;
• a semiconductor package disposed on a first end of the resin insulating layer and a second end of the resin insulating layer;
• a first electrode fixed to an upper surface of the semiconductor package disposed on the first end of the resin insulating layer;
• and
• a second electrode fixed to an upper surface of the semiconductor package disposed on the second end of the resin insulating layer,
• wherein a lower surface of the metal block is exposed from the mold resin,
• the main terminal and the signal terminal are each exposed from a side surface of the mold resin,
• the main terminal has a first portion in the mold resin, a second portion continuous with the first portion and bent downward outside the mold resin, and a third portion continuous with the second portion and substantially parallel to a lower surface of the mold resin,
• the main terminal and the first electrode are fixed to a first circuit pattern among the plurality of circuit patterns, and
• the lower surface of the metal block and the second electrode are fixed to a second circuit pattern among the plurality of circuit patterns.