Conductive structures of integrated circuits

A method, comprising:

• forming a semiconductor device, comprising:
• forming a gate structure on a substrate;
• depositing a dielectric layer on the gate structure;
• and
• forming a contact structure on the gate structure and in the dielectric layer;
• and
• forming, on the semiconductor device, an interconnect structure, comprising:
• forming a trench at an interface between the dielectric layer and the contact structure and surrounding a top portion of the contact structure, wherein the trench comprises a sidewall of the contact structure and a sidewall of the dielectric layer;
• depositing an etch stop layer in contact with sidewalls of the contact structure and the dielectric layer in the trench;
• forming a barrier structure in the trench and surrounding a top portion of the contact structure;
• depositing a liner on the barrier structure;
• depositing a conductive layer on the liner;
• and
• performing a polishing process on the barrier structure, the liner, and the conductive layer.

A method, comprising:

• forming a contact structure on a source/drain region;
• depositing a first dielectric layer on the contact structure;
• forming a conductive structure in the first dielectric layer;
• etching portions of the first dielectric layer and the conductive structure to form a trench surrounding the conductive structure, wherein the trench comprises a sidewall of the conductive structure and a sidewall of the first dielectric layer;
• depositing a second dielectric layer in contact with the sidewalls of the conductive structure and the first dielectric layer in the trench and on the first dielectric layer;
• depositing a third dielectric layer on the second dielectric layer;
• forming a barrier structure on the conductive structure and in the second and third dielectric layers;
• and
• depositing a conductive layer on the barrier structure.