Interconnect structure with dielectric cap layer and etch stop layer stack
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChao-Chun Wang, Jen Hung Wang
Life of this patent
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Abstract
A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a metal cap layer over an upper surface of the first conductive feature distal from the substrate; selectively forming a dielectric cap layer over an upper surface of the first dielectric layer and laterally adjacent to the metal cap layer, wherein the metal cap layer is exposed by the dielectric cap layer; and forming an etch stop layer stack over the metal cap layer and the dielectric cap layer, wherein the etch stop layer stack comprises a plurality of etch stop layers.
Claims20
A semiconductor device comprising:
- a substrate;
- a first dielectric layer over the substrate;
- a first conductive feature in the first dielectric layer, wherein an upper surface of the first conductive feature distal from the substrate extends further from the substrate than an upper surface of the first dielectric layer distal from the substrate;
- a metal cap layer on the first conductive feature;
- a dielectric cap layer on the upper surface of the first dielectric layer, wherein the dielectric cap layer is laterally adjacent to the metal cap layer, wherein the dielectric cap layer comprises a nitride-containing dielectric material, wherein an upper surface of the metal cap layer distal from the substrate is free of the dielectric cap layer;
- an etch stop layer stack on the metal cap layer and the dielectric cap layer, wherein the etch stop layer stack comprises a plurality of etch stop layers;
- a second dielectric layer on the etch stop layer stack;
- and
- a second conductive feature in the second dielectric layer, wherein the second conductive feature extends through the etch stop layer stack and is electrically coupled to the first conductive feature.
A semiconductor device comprising:
- a first dielectric layer over a substrate;
- a first conductive feature in the first dielectric layer;
- a conductive cap layer on a first surface of the first conductive feature distal from the substrate;
- a dielectric cap layer on a first surface of the first dielectric layer distal from the substrate, wherein the dielectric cap layer is laterally adjacent to the conductive cap layer, wherein the conductive cap layer is exposed by the dielectric cap layer, wherein the first surface of the first conductive feature extends further from the substrate than the first surface of the first dielectric layer;
- an etch stop layer stack on the conductive cap layer and the dielectric cap layer, wherein the etch stop layer stack comprises a plurality of etch stop layers;
- a second dielectric layer on the etch stop layer stack;
- and
- a second conductive feature in the second dielectric layer and electrically coupled to the first conductive feature.
A semiconductor device comprising:
- a substrate;
- a first dielectric layer over the substrate;
- a conductive line in the first dielectric layer;
- a conductive cap layer on an upper surface of the conductive line distal from the substrate;
- a dielectric cap layer on an upper surface of the first dielectric layer and laterally adjacent to the conductive cap layer, wherein an upper surface of the conductive cap layer distal from the substrate is free of the dielectric cap layer;
- and
- an etch stop layer stack on the conductive cap layer and the dielectric cap layer, wherein the etch stop layer stack comprises:
- a first sublayer comprising aluminum nitride and disposed over the conductive cap layer and the dielectric cap layer;
- a second sublayer comprising aluminum oxide and disposed over the first sublayer;
- a third sublayer comprising oxygen-doped silicon carbide and disposed over the second sublayer;
- and
- a fourth sublayer comprising aluminum oxide and disposed over the third sublayer.
Dependencies are inferred from the claim text.