Semiconductor structures with improved metal capping layers

A method, comprising:

• forming a first dielectric layer on a semiconductor structure, wherein the semiconductor structure comprises a substrate and an MLI structure on the substrate, the MLI structure comprises a plurality of metallization layers sequentially formed on the substrate, each metallization layer further comprises a plurality of metal lines, each metal line comprises a metal capping layer in a top portion of the metal line, and the first dielectric layer is formed on a topmost metallization layer of the plurality of metallization layers;
• forming a plurality of first metal vias in the first dielectric layer, each first metal via connected to one of the metal lines in the topmost metallization layer under the first dielectric layer;
• forming a TSV opening, the TSV opening extending vertically through the first dielectric layer and the plurality of metallization layers into the substrate;
• filling a conductive material in the TSV opening to form a TSV;
• performing a first planarization process on the conductive material and the first dielectric layer;
• after performing the first planarization process, forming a second dielectric layer on the first dielectric layer;
• forming a plurality of first metal lines in the second dielectric layer, wherein each one of the first metal lines is connected to one of the metal vias in the first dielectric layer;
• forming a plurality of first metal capping layers respectively on the plurality of first metal lines;
• and
• performing a second planarization process to planarize the first metal capping layers.

A semiconductor structure, comprising:

• a substrate;
• an MLI structure, the MLI structure comprising a base metallization layer (M0 layer) disposed on the substrate and a plurality of metallization layers (Mi layers) sequentially formed on the M0 layer, wherein Mi represents the ith metallization layer of the plurality of metallization layers, i is an integer and i≥1, the Mi layers further includes an Nth metallization layer (MN layer), N is an integer and N>1, and each one of the Mi layers further comprises:
• a dielectric layer;
• and
• a plurality of metal lines formed in the dielectric layer, wherein each metal line further comprises a metal capping layer formed in a top portion of the metal line, and the metal capping layers of the metal lines included in the plurality of metallization layers except the MN layer have an average thickness;
• and
• at least one metal via electrically connecting one of the metal lines in the Mi layer to one of the metal lines in a Mi−1 layer, and
• a TSV extending vertically from a top surface to a bottom surface, wherein the top surface of the TSV is in the dielectric layer of the MN layer, the bottom surface is in the substrate, the metal capping layers of the metal lines included in the MN layer have a thickness substantially the same as the average thickness;
• wherein the top surface of the TSV is below a top surface of the dielectric layer of the MN layer, the MN layer further comprises a TSV connector formed in the dielectric layer of the MN layer, the TSV connector extends from the top surface of the dielectric layer to the top surface of the TSV, and the TSV connector is vertically aligned with and electrically connected to the TSV.