Compatible hybrid-cell structure, device having the same, and method

A device comprising:

• first, second, and third Power/Ground (PG) conductive elements extending in a first direction;
• a first set of at least three conductive tracks between the first and second PG conductive elements and a second set of at least three conductive tracks between the second and third PG conductive elements, the conductive tracks being arranged in equal numbers between the first and second PG conductive elements and between the second and third PG conductive elements;
• a first cell having a first height in a second direction, orthogonal to the first direction, and overlapping all of the first set of at least three conductive tracks;
• a second cell having a second height, and overlapping all of the first set of at least three conductive tracks and overlapping at least one conductive track of the second set of at least three conductive tracks such that the second height is greater than the first height;
• a third cell overlapping all of the second set of at least three M0 tracks and having the first height such that the first and third cells have the same heights;
• and
• a fourth cell having a fourth height overlapping less than all conductive tracks of the second set of at least three conductive tracks, combined heights of the first and third cells being the same as combined heights of the second and fourth cells.

A method of fabricating an integrated circuit device, the method comprising:

• forming first, second, and third power/ground (PG) conductive elements extending in a first direction;
• forming a first set of at least three conductive tracks between the first and second PG conductive elements and a second set of at least three conductive tracks between the second and third PG conductive elements, the conductive tracks being formed in equal numbers between the first and second PG conductive elements and between the second and third PG conductive elements;
• forming circuits in a first row of cells arranged in the first direction and overlapping the first set of at least three conductive tracks;
• and
• forming circuits in a second row of cells arranged in the first direction and overlapping the second set of at least three conductive tracks,
• wherein:
• in the first row of cells, a first cell has a first height in a second direction, orthogonal to the first direction,
• in the first row of cells, a second cell has a height that is greater than the first height,
• in the second row of cells, a third cell shares a boundary extending in the first direction with the first cell and has the first height,
• in the second row of cells, a fourth cell shares a boundary extending in the first direction with the second cell and has a height less than the first height, combined heights of the second and fourth cells corresponding to combined heights of the first and third cells, and
• between the second and third PG conductive elements, a conductive track is aligned with a boundary, extending in the first direction, of the second and fourth cells and is formed as an in-cell PG track.