Forming NS gates with improved mechanical stability

Abstract

A semiconductor device includes a first gate stack disposed over an active region and a second gate stack disposed over a shallow trench isolation (STI) region such that the first gate stack is taller than the second gate stack. The second gate stack includes a plurality of gates formed over a non-active region. The nanosheet stacks in the active region include first inner spacers and second inner spacers. The first inner spacers are vertically aligned with the second inner spacers. Further, the first inner spacers directly contact lower sidewalls of a source/drain epitaxial region to isolate the second gate stack from the STI region.

Dependencies are inferred from the claim text.