Field plates for integrated circuits

A transistor, comprising:

• an insulator layer over a substrate including a semiconductor layer comprising aluminum, gallium and nitrogen;
• a first opening extending through the insulator layer and into the semiconductor layer defining a drain region;
• a second opening extending through the insulator layer and into the semiconductor layer defining a source region;
• a gate electrode extending into the insulator layer between the source region and the drain region;
• and
• a metal layer including noncontiguous first and second portions, the first portion extending into the first opening and touching the semiconductor layer and the second portion extending from the semiconductor layer over the gate electrode to form a source field plate,
• wherein the metal layer is a first metal layer the source field plate is a first source field plate, and further comprising:
• a second metal layer over the first metal layer, the second metal layer including noncontiguous third and fourth portions, the third portion conductively connected to the first portion of the first metal layer and the fourth portion conductively connected to the second portion of the first metal layer, the fourth portion having a second source field plate over the first source field plate.

A method comprising:

• forming a first opening extending through a first insulating layer to a substrate including gallium nitride (GaN), the first opening defining a drain of a transistor;
• forming a second opening extending through the first insulating layer to the substrate, the second opening defining a source the transistor
• forming a gate of the transistor extending into the first insulating layer;
• forming a first metal layer over the first insulating layer, the first metal layer having:
• a first via extending through the first opening to the substrate;
• a second via extending through the second opening to the substrate;
• and
• a first source field plate over the gate, the first source field plate and the second via being contiguous portions of the first metal layer,
• forming a second metal layer over the first metal layer, the second metal layer having a second source field plate over the gate, wherein forming the second metal layer includes depositing the second metal layer on a planarized surface of an insulator layer;
• and
• forming a third metal layer over the second metal layer, the third metal layer having a third source field plate over the gate.