Electrostatic discharge (ESD) protection device and transistor structure

An electrostatic discharge (ESD) protection device comprising:

• a substrate having a first conductivity type;
• a deep-well region formed on the substrate and having a second conductivity type;
• a first well region formed on the deep-well region and having the second conductivity type;
• a second well region formed on the deep-well region and having the first conductivity type;
• a third well region formed on the deep-well region and having the second conductivity type;
• a fourth well region formed on the deep-well region and having the first conductivity type;
• a fifth well region formed in the fourth well region and having the second conductivity type;
• a first doped region formed in the first well region and having the second conductivity type;
• a second doped region formed in the second well region and having the first conductivity type;
• a third doped region formed in the fourth well region and having the first conductivity type;
• and
• a gate structure covering the third well region,
• wherein an impurity concentration of the fifth well region is higher than an impurity concentration of the first well region and an impurity concentration of the third well region.