US 12,720,810 B2Granted

Semiconductor device and forming method thereof

AssigneeHon Young Semiconductor Corporation

InventorsYu-Tsu Lee, Yan-Ru Chen, Kuang-Hao Chiang

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Abstract

The present disclosure provides a semiconductor device including a drift layer above the substrate, a source/drain region above the drift layer, an oxide thin film on the source/drain region, a contact on the oxide thin film, and a gate structure adjacent to source/drain region. The oxide thin film directly contacts the top surface of the source/drain region and the bottom surface of the contact. The source/drain region includes a first doping region having a first conductive type and a second doping region having a second conductive type different from the first conductive type, in which the first doping region and the second doping region forms the top surface of the source/drain region. The conduction band energy level of the oxide thin film is lower than the conduction band energy level of the first doping region.

Claims15

Dependent claims

A semiconductor device, comprising:

a drift layer above a substrate;
a source/drain region above the drift layer, wherein the source/drain region comprises:
a first doping region having a p conductive type;
and
a second doping region having an n conductive type, wherein the first doping region and the second doping region form a top surface of the source/drain region;
an oxide thin film directly contacting the top surface of the source/drain region, wherein the oxide thin film comprises:
a first film portion covering the first doping region, wherein a conduction band energy level of the first film portion is lower than a conduction band energy level and a valance band energy level of the first doping region, and an energy gap between the conduction band energy level of the first film portion and the valance band energy level of the first doping region is larger than or equal to 0.1 eV;
and
a second film portion covering the second doping region, wherein an energy gap between the conduction band energy level of the second film portion and the conduction band energy level of the second doping region is smaller than or equal to 0.1 eV;
a contact on the oxide thin film, wherein the oxide thin film directly contacts a bottom surface of the contact;
and
a gate structure adjacent to the source/drain region.

9 more elements

A method of forming a semiconductor device, comprising:

forming a drift layer above a substrate;
doping a top surface of the drift layer with a p conductive type dopant to form a first doping region of a source/drain region;
doping the top surface of the drift layer with a n conductive type dopant to form a second doping region of the source/drain region;
forming an oxide thin film on the source/drain region, wherein the oxide thin film directly contacts a top surface of the source/drain region, and the oxide thin film comprises:
a first film portion covering the first doping region, wherein a conduction band energy level of the first film portion is lower than a conduction band energy level and a valance band energy level of the first doping region, and an energy gap between the conduction band energy level of the first film portion and the valance band energy level of the first doping region is larger than or equal to 0.1 eV;
and
a second film portion covering the second doping region, wherein an energy gap between the conduction band energy level of the second film portion and the conduction band energy level of the second doping region is smaller than or equal to 0.1 eV;
and
forming a contact on the oxide thin film, wherein a bottom surface of the contact directly contacts the oxide thin film.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 18/170,556Filed 17 Feb 2023
Priority: TW 1111474949 Dec 2022
Published: US 2024/0194790 A113 Jun 2024
Granted: 25 Aug 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

H10D 30/6755
Characterised by the active materials: oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
H10D 62/165
Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions: tunnel injectors
H10D 30/0297
Of vertical dmos [vdmos] fets: using recessing of the gate electrodes, e.g. to form trench gate electrodes
H10D 30/031
Of FETs having insulated gates [IGFET]: of thin-film transistors [TFT]