High-temperature implant for gate-all-around devices
AssigneeApplied Materials, Inc.
InventorsYan Zhang, Taegon Kim, Johannes M. Van Meer, Vikram M. Bhosle, Jae Young Lee, Naushad K. Variam
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AssigneeApplied Materials, Inc.
InventorsYan Zhang, Taegon Kim, Johannes M. Van Meer, Vikram M. Bhosle, Jae Young Lee, Naushad K. Variam
Estimating the term…
Approaches herein provide devices and methods for forming gate-all-around transistors with improved gate spacer k-values. One method may include forming a gate-all-around (GAA) stack including a plurality of alternating first layers and second layers, and forming a source/drain (S/D) cavity through the plurality of alternating first layers and second layers. The method may further include forming an inner spacer in the S/D cavity, adjacent the plurality of alternating first layers and second layers, performing a first implant by directing fluorine ions to the GAA stack, through the S/D cavity, wherein the first implant is performed at a temperature greater than 30° Celsius and forming a S/D material in the S/D cavity following the first implant.
A method, comprising:
A method for forming a gate-all-around (GAA) device, comprising:
A system, comprising:
Dependencies are inferred from the claim text.