Semiconductor device

A semiconductor device, comprising:

• a first electrode;
• a first semiconductor region located on the first electrode and electrically connected with the first electrode, the first semiconductor region being of a first conductivity type;
• a second semiconductor region located on the first semiconductor region, the second semiconductor region being of the first conductivity type and having a lower first-conductivity-type impurity concentration than the first semiconductor region;
• a plurality of third semiconductor regions located on a portion of the second semiconductor region, the third semiconductor regions being of the first conductivity type and having a higher first-conductivity-type impurity concentration than the second semiconductor region;
• a fourth semiconductor region located on the second semiconductor region and on the third semiconductor regions, the fourth semiconductor region being of a second conductivity type;
• a plurality of fifth semiconductor regions located on a portion of the fourth semiconductor region, the fifth semiconductor regions being of the second conductivity type and having a higher second-conductivity-type impurity concentration than the fourth semiconductor region, at least a portion of one of the fifth semiconductor regions being positioned above at least a portion of one of the third semiconductor regions;
• and
• a second electrode located on the fifth semiconductor region and electrically connected with the fifth semiconductor region,
• the third semiconductor regions and the fifth semiconductor regions extending in a second direction perpendicular to a first direction,
• the first direction being from the first electrode toward the second electrode,
• a length of an upper surface of each of the third semiconductor regions in a third direction perpendicular to the first direction and the second direction, being greater than a distance between two of the third semiconductor regions that are next to each other,
• the length of the upper surface of each of the third semiconductor regions in the third direction being greater than a length of a bottom surface of the third semiconductor region in the third direction.

A semiconductor device, comprising:

• a first electrode;
• a first semiconductor region located on the first electrode and electrically connected with the first electrode, the first semiconductor region being of a first conductivity type;
• a second semiconductor region located on the first semiconductor region, the second semiconductor region being of the first conductivity type and having a lower first-conductivity-type impurity concentration than the first semiconductor region;
• a third semiconductor region located on a portion of the second semiconductor region, the third semiconductor region being of the first conductivity type and having a higher first-conductivity-type impurity concentration than the second semiconductor region;
• a fourth semiconductor region located on the second semiconductor region and on the third semiconductor region, the fourth semiconductor region being of a second conductivity type;
• a fifth semiconductor region located on a portion of the fourth semiconductor region, the fifth semiconductor region being of the second conductivity type and having a higher second-conductivity-type impurity concentration than the fourth semiconductor region, at least a portion of the fifth semiconductor region being positioned above at least a portion of the third semiconductor region;
• and
• a second electrode located on the fifth semiconductor region and electrically connected with the fifth semiconductor region,
• the third semiconductor region and the fifth semiconductor region extending in a second direction perpendicular to a first direction, the first direction being from the first electrode toward the second electrode,
• the fourth semiconductor region including a plurality of first regions and a plurality of second regions that are alternately arranged in a third direction perpendicular to the first direction and the second direction,
• lower ends of the second regions being lower than lower ends of the first regions,
• at least a portion of one of the second regions being positioned between the fifth semiconductor region and the third semiconductor region in the first direction,
• opposite ends of the one of the second regions in the third direction being in contact with adjacent two of the first regions, respectively, wherein
• a plurality of the third semiconductor regions is included, and
• a length of the third semiconductor region in the third direction is greater than a distance between two of the third semiconductor regions that are next to each other.