Back to results
US 12,720,778 B2Granted
Integrated circuits with high dielectric constant interfacial layering
AssigneeIntel Corporation
InventorsSarah Atanasov, Nazila Haratipour, Sou-Chi Chang, Shriram Shivaraman, Uygar E. Avci
Life of this patent
Estimating the term…
Abstract
Embodiments of the present disclosure are directed to advanced integrated circuit structure fabrication and, in particular, integrated circuits with high dielectric constant (HiK) interfacial layering between an electrode and a ferroelectric (FE) or anti-ferroelectric (AFE) layer. Other embodiments may be disclosed or claimed.
Claims24
An integrated circuit structure, comprising:
- a first electrode;
- a second electrode below the first electrode, the second electrode having an uppermost surface above a bottommost surface of the first electrode;
- a ferroelectric (FE) or anti-ferroelectric (AFE) layer between the first electrode and the second electrode, wherein the ferroelectric (FE) or anti-ferroelectric (AFE) layer extends laterally beyond the first electrode and the second electrode, and wherein the second electrode has a bottommost surface below a bottommost surface of the ferroelectric (FE) or anti-ferroelectric (AFE) layer;
- and
- an interfacial high dielectric constant (HiK) layer between the FE or AFE layer and the first electrode.
2 more elements
An integrated circuit structure, comprising:
- a first electrode;
- a second electrode below the first electrode, the second electrode having an uppermost surface above a bottommost surface of the first electrode;
- a ferroelectric (FE) or anti-ferroelectric (AFE) layer between the first electrode and the second electrode, wherein the ferroelectric (FE) or anti-ferroelectric (AFE) layer extends laterally beyond the first electrode and the second electrode, and wherein the second electrode has a bottommost surface below a bottommost surface of the ferroelectric (FE) or anti-ferroelectric (AFE) layer;
- a first interfacial high dielectric constant (HiK) layer between the FE or AFE layer and the first electrode;
- and
- a second interfacial HiK layer between the second electrode and the FE or AFE layer.
3 more elements
A computing device, comprising:
- a board;
- and
- a component coupled to the board, the component including an integrated circuit structure, comprising:
- a first electrode;
- a second electrode below the first electrode, the second electrode having an uppermost surface above a bottommost surface of the first electrode;
- a ferroelectric (FE) or anti-ferroelectric (AFE) layer between the first electrode and the second electrode, wherein the ferroelectric (FE) or anti-ferroelectric (AFE) layer extends laterally beyond the first electrode and the second electrode, and wherein the second electrode has a bottommost surface below a bottommost surface of the ferroelectric (FE) or anti-ferroelectric (AFE) layer;
- and
- an interfacial high dielectric constant (HiK) layer between the FE or AFE layer and the first electrode.
5 more elements
A computing device, comprising:
- a board;
- and
- a component coupled to the board, the component including an integrated circuit structure, comprising:
- a first electrode;
- a second electrode below the first electrode, the second electrode having an uppermost surface above a bottommost surface of the first electrode;
- a ferroelectric (FE) or anti-ferroelectric (AFE) layer between the first electrode and the second electrode, wherein the ferroelectric (FE) or anti-ferroelectric (AFE) layer extends laterally beyond the first electrode and the second electrode, and wherein the second electrode has a bottommost surface below a bottommost surface of the ferroelectric (FE) or anti-ferroelectric (AFE) layer;
- a first interfacial high dielectric constant (HiK) layer between the FE or AFE layer and the first electrode;
- and
- a second interfacial HiK layer between the second electrode and the FE or AFE layer.
6 more elements
Dependencies are inferred from the claim text.