Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsJaekyu Sung, Joonghyun Baek, Cheolwoo Lee
Life of this patent
Estimating the term…
Abstract
A semiconductor package may include a substrate; at least one controller chip on the substrate; at least one chip structure on the substrate, the at least one chip structure including a buffer chip, an upper chip stack on the buffer chip, and a lower chip stack below the buffer chip; an upper wire electrically connecting the upper chip stack, the buffer chip, and the at least one controller chip; a lower wire electrically connecting the lower chip stack and the at least one controller chip; a connection wire electrically connecting the at least one controller chip to the substrate; and connection bumps below the substrate, the connection bumps being electrically connected to the at least one controller chip and the at least one chip structure.
Claims20
A semiconductor package, comprising:
- a substrate including bonding pads;
- at least one controller chip on the substrate;
- at least one chip structure on the substrate and adjacent to the at least one controller chip,
- the at least one chip structure including a buffer chip, an upper chip stack on an upper surface of the buffer chip, and a lower chip stack on a lower surface of the buffer chip, the lower surface of the buffer chip being opposite the upper surface of the buffer chip, the buffer chip including buffer pads on the upper surface of the buffer chip,
- the upper chip stack including upper semiconductor chips with first connection pads, and
- the lower chip stack including lower semiconductor chips with second connection pads;
- a bonding wire structure electrically connecting the substrate, the at least one controller chip, and the at least one chip structure;
- and
- an encapsulant encapsulating the at least one controller chip and the at least one chip structure, wherein
- the upper chip stack is connected to the at least one controller chip via the buffer chip, and
- the lower chip stack is connected to the at least one controller chip via the substrate.
A semiconductor package, comprising:
- a substrate;
- at least one controller chip on the substrate;
- at least one chip structure on the substrate, the at least one chip structure including a buffer chip, an upper chip stack on the buffer chip, and a lower chip stack below the buffer chip;
- an upper wire electrically connecting the upper chip stack, the buffer chip, and the at least one controller chip;
- a lower wire electrically connecting the lower chip stack and the at least one controller chip;
- a connection wire electrically connecting the at least one controller chip to the substrate;
- and
- connection bumps below the substrate, the connection bumps being electrically connected to the at least one controller chip and the at least one chip structure.
A semiconductor package, comprising:
- a substrate;
- at least one controller chip on the substrate;
- at least one chip structure on the substrate, the at least one chip structure including a buffer chip, an upper chip stack on the buffer chip, and a lower chip stack below the buffer chip;
- an upper wire electrically connecting the upper chip stack, the buffer chip, and the at least one controller chip,
- the upper wire including a long wire directly connecting the buffer chip and the at least one controller chip;
- and
- a lower wire electrically connecting the lower chip stack and the at least one controller chip.
Dependencies are inferred from the claim text.