Memory device including capacitor contacts having different materials and method for preparing the same
AssigneeNanya Technology Corporation
InventorYing-Cheng Chuang
Life of this patent
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Abstract
A memory device includes a bit line structure disposed over a semiconductor substrate, and a lower capacitor contact disposed in and extending above the semiconductor substrate. The lower capacitor contact includes polysilicon. The memory device also includes an upper capacitor contact disposed over the lower capacitor contact. The upper capacitor contact includes titanium nitride. The memory device further includes a first spacer layer disposed between the lower capacitor contact and the bit line structure and between the upper capacitor contact and the bit line structure. In addition, the memory device includes a capacitor disposed over the first spacer layer.
Claims9
A method for preparing a memory device, comprising:
- forming a bit line structure over a semiconductor substrate;
- forming a first spacer layer and a second spacer layer on a sidewall of the bit line structure;
- etching the second spacer layer and the semiconductor substrate to form a first opening adjacent to the bit line structure;
- filling the first opening with a lower capacitor contact, wherein the lower capacitor contact protrudes over the semiconductor substrate;
- forming an upper capacitor contact over the lower capacitor contact, wherein the upper capacitor contact and the lower capacitor contact comprise different materials;
- forming a landing pad layer over the upper capacitor contact;
- etching the landing pad layer, the first spacer layer and the second spacer layer to form a second opening;
- forming a capacitor in the second opening;
- forming a third spacer material covering the first spacer layer, the second spacer layer and the upper capacitor contact;
- and
- partially removing the third spacer material to expose the upper capacitor contact before the landing pad layer is formed.
A method for preparing a memory device, comprising:
- forming a bit line structure over a semiconductor substrate;
- forming a first spacer layer and a second spacer layer on a sidewall of the bit line structure;
- etching the second spacer layer and the semiconductor substrate to form a first opening adjacent to the bit line structure;
- filling the first opening with a lower capacitor contact, wherein the lower capacitor contact protrudes over the semiconductor substrate;
- forming an upper capacitor contact over the lower capacitor contact, wherein the upper capacitor contact and the lower capacitor contact comprise different materials;
- forming a landing pad layer over the upper capacitor contact;
- etching the landing pad layer, the first spacer layer and the second spacer layer to form a second opening;
- forming a capacitor in the second opening;
- forming a sacrificial layer on a sidewall of the first spacer layer before the second spacer layer is formed;
- and
- removing the sacrificial layer to form an air gap before the first opening is formed.
A method for preparing a memory device, comprising:
- forming a bit line structure over a semiconductor substrate;
- forming a first spacer layer and a second spacer layer on a sidewall of the bit line structure;
- etching the second spacer layer and the semiconductor substrate to form a first opening adjacent to the bit line structure;
- filling the first opening with a lower capacitor contact, wherein the lower capacitor contact protrudes over the semiconductor substrate;
- forming an upper capacitor contact over the lower capacitor contact, wherein the upper capacitor contact and the lower capacitor contact comprise different materials;
- forming a landing pad layer over the upper capacitor contact;
- etching the landing pad layer, the first spacer layer and the second spacer layer to form a second opening;
- forming a capacitor in the second opening;
- forming a sacrificial layer on a sidewall of the first spacer layer before the second spacer layer is formed;
- and
- removing the sacrificial layer through the second opening to form an air gap.
Dependencies are inferred from the claim text.