Mating backplane for high speed, high density electrical connector
AssigneeAmphenol Corporation
InventorsMarc B. Cartier, Jr., Mark W. Gailus, David Levine, Vysakh Sivarajan
Life of this patent
Estimating the term…
Abstract
A printed circuit board includes: a plurality of layers including attachment layers and routing layers; and via patterns formed in one or more of the plurality of layers, each of the via patterns including: first and second signal vias configured to accept contact tails of signal conductors of a connector; ground vias configured to accept contact tails of ground conductors of the connector; ground shadow vias located adjacent to each of the first and second signal vias; and non-plated holes located between each of the ground shadow vias and the signal vias. Different layers of the plurality of layers may have different antipad configurations.
Claims27
A printed circuit board comprising:
- a plurality of layers including attachment layers and routing layers;
- and
- via patterns formed in one or more of the plurality of layers, each of the via patterns comprising:
- first and second signal vias configured to accept contact tails of signal conductors of a connector;
- ground vias configured to accept contact tails of ground conductors of the connector;
- ground shadow vias located adjacent to each of the first and second signal vias;
- and
- non-plated holes located between each of the ground shadow vias and the signal vias,
- wherein each of the first and second signal vias is configured with a first section having a first diameter and a second section having a second diameter, less than the first diameter, and
- wherein the first and second signal vias are plated with a conductive material from a top surface of the printed circuit board at least to a breakout layer of the routing layers.
A printed circuit board comprising:
- a plurality of layers including attachment layers and routing layers;
- and
- via patterns formed in one or more of the plurality of layers, each of the via patterns comprising:
- first and second signal vias configured to accept contact tails of signal conductors of a connector, wherein each of the first and second signal vias is configured with a first section having a first diameter in the attachment layers and a second section having a second diameter, less than the first diameter, in the routing layers;
- ground vias configured to accept contact tails of ground conductors of the connector;
- ground shadow vias located adjacent to each of the first and second signal vias, wherein each of the ground shadow vias is configured with a first section having a third diameter in the attachment layers and a second section having a fourth diameter, greater than the third diameter, in the routing layers;
- and
- non-plated holes located between each of the ground shadow vias and the signal vias in the attachment layers.
Dependencies are inferred from the claim text.