Imaging element, imaging apparatus, operation method of imaging element, and program

An imaging apparatus comprising:

• an imaging element;
• a processor;
• and
• a signal processing circuit, wherein:
• the imaging element includes
• a reception interface that receives an imaging synchronization signal related to a timing of imaging, and at least one output synchronization signal related to a timing of output of image data obtained by imaging, from an exterior of the imaging element,
• a memory that stores the image data obtained by imaging at a first frame rate in accordance with the imaging synchronization signal received by the reception interface, and
• an output circuit that outputs the image data stored in the memory at a second frame rate in accordance with the output synchronization signal received by the reception interface, wherein:
• the first frame rate is greater than or equal to the second frame rate,
• the output circuit outputs a most recent item of image data among a plurality of items of the image data, and
• in a case in which storage of the image data for one frame related to a subject imaged at a current point in time in the memory is completed within an output completion time period predicted as a time period in which output of the image data of one frame will be completed, the most recent item of image data comprises the image data for one frame related to the subject imaged at the current point in time, and in a case in which storage of the image data for one frame related to the subject imaged at the current point in time in the memory is not completed within the output completion time period, the most recent item of image data is the image data for which one frame is already stored in the memory, wherein:
• the processor performs an instruction to change an output interval of the output synchronization signal in response to a state of the signal processing circuit.

A method of operating an imaging apparatus that comprises a processor, a signal processing circuit, and an imaging element that includes a reception interface, a memory, and an output circuit, the method comprising:

• by the reception interface, receiving an imaging synchronization signal related to a timing of imaging, and at least one output synchronization signal related to a timing of output of image data obtained by imaging, from an exterior of the imaging element;
• by the memory, storing the image data obtained by imaging at a first frame rate in accordance with the imaging synchronization signal received by the reception interface;
• by the output circuit, outputting the image data stored in the memory at a second frame rate in accordance with the output synchronization signal received by the reception interface;
• and
• setting the first frame rate to be greater than or equal to the second frame rate, wherein:
• the reception interface includes a first reception interface and a second reception interface,
• the first reception interface receives the imaging synchronization signal from the exterior,
• the second reception interface receives the output synchronization signal from the exterior, and
• the processor performs an instruction to change an output interval of the output synchronization signal in response to a state of the signal processing circuit.

A non-transitory computer-readable storage medium storing a program executable by a computer to function as a reception interface, an output circuit, and a processor included in an imaging apparatus that comprises the processor, a signal processing circuit, and an imaging element that includes the reception interface, a memory, and the output circuit, wherein:

• the reception interface receives an imaging synchronization signal related to a timing of imaging, and at least one output synchronization signal related to a timing of output of image data obtained by imaging, from an exterior of the imaging element,
• the memory stores the image data obtained by imaging at a first frame rate in accordance with the imaging synchronization signal received by the reception interface, the output circuit outputs the image data stored in the memory at a second frame rate in accordance with the output synchronization signal received by the reception interface,
• the first frame rate is greater than or equal to the second frame rate,
• the reception interface includes a first reception interface and a second reception interface,
• the first reception interface receives the imaging synchronization signal from the exterior,
• the second reception interface receives the output synchronization signal from the exterior, and
• the processor performs an instruction to change an output interval of the output synchronization signal in response to a state of the signal processing circuit.