Centralized non-system-memory gateway circuit

A method, comprising:

• receiving, at a first circuit of a computer system having a plurality of agent circuits including a source agent circuit, network credit of the source agent circuit that reserves routing storage for a non-DRAM transaction, the source agent circuit being coupled to a first packet-switching network of the computer system, and the computer system being situated on one or more co-packaged integrated circuits (ICs);
• receiving, at a gateway circuit of the computer system, a request message for a non-DRAM transaction originating from the source agent circuit;
• storing, by the gateway circuit, the request message in an input buffer reserved for messages originating from the source agent circuit via the first packet-switching network;
• decoding, by the gateway circuit, the request message to determine that a destination agent circuit of the plurality of agent circuits is a destination for the request message, the destination agent circuit being coupled to a second packet-switching network of the plurality of packet-switching networks;
• routing, by the gateway circuit, the request message to an output buffer reserved for messages bound for the destination agent circuit via the second, different packet-switching network;
• arbitrating, by the gateway circuit, between multiple messages destined for the second packet-switching network;
• upon successful arbitration, outputting, by the gateway circuit, the request message;
• and
• returning, by the first circuit, network credit to the source agent circuit prior to the request message being received by the destination agent circuit.

An apparatus, comprising:

• a computer system situated on one or more co-packed integrated circuits (ICs), wherein the computer system includes:
• a plurality of networks that includes a first network having a first set of network hardware and a second network having a second, different set of network hardware;
• a plurality of agent circuits configured to send and/or receive transactions over one or more of the plurality of networks, wherein the plurality of agent circuits includes:
• one or more processor circuits connected to the first network but not the second network;
• and
• one or more memory controllers configured to couple to system memory that includes dynamic random-access memories (DRAMs);
• and
• a non-system-memory gateway (NSM GW) circuit coupled to the first network and the second network and configured to:
• receive, from a source agent circuit of the plurality of agent circuits located on the first network, a request message for a non-DRAM transaction;
• route the request message to a destination agent circuit of the plurality of agent circuits that is specified in the request message and that is located on the second network;
• and
• act as a termination point for the non-DRAM transaction such that the computer system returns network credit to the source agent circuit for the request message prior to the destination agent circuit receiving the request message.