Delta-sigma modulators with downsampled digital integrators
AssigneeNXP B.V.
InventorJan Daniël van der Klooster
Life of this patent
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Abstract
Systems and methods for delta-sigma modulators with downsampled digital integrators. In various embodiments, a delta-sigma modulator may include: a comparator configured to receive an analog input and to provide a digital output at a sampling frequency, where the digital output is applied to an integrator path and to a feed-forward path; a digital integrator in the integrator path, where the digital integrator is configured to operate with a clock frequency that is less the sampling frequency; and a summer configured to add an output of the integrator path to an output of the feed-forward path to produce a bitstream.
Claims20
A delta-sigma modulator, comprising:
- a comparator configured to receive an analog input and to provide a digital output at a sampling frequency, wherein the digital output is applied to an integrator path and to a feed-forward path;
- a digital integrator in the integrator path, wherein the digital integrator is configured to operate with a clock frequency that is less the sampling frequency;
- and
- a summer configured to add an output of the integrator path to an output of the feed-forward path to produce a bitstream.
A delta-sigma modulator, comprising:
- a comparator configured to receive an analog input;
- an integrator path configured to receive a digital output of the comparator, wherein the integrator path comprises a digital integrator configured to operate with a clock frequency smaller than a sampling frequency of the comparator, and wherein the digital integrator adds a pole to a transfer function of the delta-sigma modulator;
- and
- a feed-forward path configured to receive a digital output of the comparator and to compensate for the pole.
In an Analog-to-Digital Converter (ADC), a method comprising:
- producing a digital output using a comparator operating at a sampling frequency;
- providing the digital output to an integration path and to a feed-forward path;
- downsampling the data of the integration path to a lower frequency than the sampling frequency;
- integrating the data of the integration path with a digital integrator after the downsampling;
- and
- combining the integrated downsampled data of the integration path with the digital output to produce a bitstream.
Dependencies are inferred from the claim text.