Time interleaved analog to digital converter and signal conversion method
AssigneeRealtek Semiconductor Corp.
InventorShih-Hsiung Huang
Life of this patent
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Abstract
A time-interleaved analog-to-digital converter includes a plurality of channel circuitries, an output circuit, and a calibration circuitry. The plurality of channel circuitries are configured to sample an input signal to generate a plurality of first digital codes according to the input signal. The output circuit is configured to output a second digital code according to the plurality of first digital codes. The calibration circuitry is configured to adjust a sampling sequence of the plurality of channel circuitries for the input signal during an initial period, and control the plurality of channel circuitries to sample the input signal in the adjusted sampling sequence during an analog-to-digital conversion period.
Claims17
A time-interleaved analog-to-digital converter, comprising:
- a plurality of channel circuitries configured to sample an input signal to generate a plurality of first digital codes according to the input signal;
- an output circuit configured to output a second digital code according to the plurality of first digital codes;
- and
- a calibration circuitry configured to adjust a sampling sequence of the plurality of channel circuitries for the input signal during an initial period, and control the plurality of channel circuitries to sample the input signal in the adjusted sampling sequence during an analog-to-digital conversion period,
- wherein the calibration circuitry is configured to output a plurality of second clock signals in different sequences as a plurality of first clock signals, and the plurality of channel circuitries are configured to sequentially sample the input signal according to the plurality of first clock signals.
A signal conversion method, comprising:
- sampling, by a plurality of channel circuitries, an input signal and generating a plurality of first digital codes according to the sampled input signal;
- outputting a second digital code according to the plurality of first digital codes;
- and
- adjusting a sampling sequence of the plurality of channel circuitries for the input signal according to the second digital code during an initial period, and controlling the plurality of channel circuitries to sample the input signal in the adjusted sampling sequence during an analog-to-digital conversion period,
- wherein adjusting the sampling sequence of the plurality of channel circuitries for the input signal according to the second digital code during the initial period, and controlling the plurality of channel circuitries to sample the input signal in the adjusted sampling sequence during the analog-to-digital conversion period comprises:
- outputting a plurality of second clock signals in different sequences as a plurality of first clock signals during the initial period, in order to adjust the sampling sequence,
- wherein the plurality of channel circuitries are configured to sequentially sample the input signal according to the plurality of first clock signals.
A time-interleaved analog-to-digital converter, comprising:
- a plurality of channel circuitries configured to sample an input signal to generate a plurality of first digital codes according to the input signal;
- an output circuit configured to output a second digital code according to the plurality of first digital codes;
- and
- a calibration circuitry configured to adjust a sampling sequence of the plurality of channel circuitries for the input signal during an initial period, and control the plurality of channel circuitries to sample the input signal in the adjusted sampling sequence during an analog-to-digital conversion period,
- wherein the calibration circuitry is configured to provide a plurality of first clock signals in different sequences to the plurality of channel circuitries, in order to adjust the sampling sequence.
Dependencies are inferred from the claim text.