Doubly-balanced auto-zero LFPS and squelch detection

A device comprising:

• processing circuitry;
• a low frequency periodic signaling (LFPS)/squelch circuit comprising:
• a threshold generator situated to receive a differential input signal from an external device and generate a differential voltage threshold signal based on the differential input signal;
• an amplifier circuit, including a switch capacitor amplifier circuit, electrically coupled to the threshold generator situated to amplify the differential voltage threshold signal resulting in an amplified threshold signal;
• a sampler situated to sample the amplified threshold signal at a first clock rate faster than a clock rate of an LFPS/squelch signaling frequency resulting in digital sample results;
• and
• a pattern filter circuit situated to determine if the digital sample results are asserted for each of a specified number of consecutive clock cycles at the first clock rate.

A method for low frequency periodic signaling (LFPS)/squelch detection, the method comprising:

• receiving, by a threshold generator, a differential input signal from an initiator device;
• generating, by the threshold generator, a differential voltage threshold signal based on the differential input signal;
• amplifying, by an amplifier circuit, which includes a switch capacitor amplifier circuit, electrically coupled to the threshold generator, the differential voltage threshold signal resulting in an amplified threshold signal;
• sampling, by a sampler, the amplified threshold signal at a first clock rate faster than a clock rate of an LFPS/squelch signaling frequency resulting in digital sample results;
• and
• generating, by a pattern filter circuit, an output signal indicating that digital sample results were asserted for each of a specified number of consecutive clock cycles at the first clock rate.