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US 12,719,478 B2Granted
System having single-event latch-up detection and mitigation
AssigneeNXP USA, Inc.
InventorsMohamed Suleman Moosa, Gary Edwin Anderson, II, Mehul D. Shroff, George Walter Lange, Antoine Fabien Dubois
Life of this patent
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Abstract
A method of detecting and mitigating an SEL is provided. The method includes measuring a current of a first circuit block of a semiconductor device and determining that the measured current exceeds a first threshold. In response to the measured current exceeding the first threshold, a supply voltage of the first circuit block is reduced from a nominal voltage value to a predetermined voltage value. After reducing the supply voltage to the predetermined voltage value, the supply voltage is restored to the nominal voltage value.
Claims20
A method comprising:
- measuring a current of a first circuit block of a semiconductor device which comprises a parasitic silicon-controlled rectifier (SCR);
- determining that the measured current exceeds a first threshold set based on a quiescent mode current and indicative of when the SCR turns on and enters into a latch up condition;
- in response to the measured current exceeding the first threshold, reducing a supply voltage to an anode of the SCR of the first circuit block from a nominal voltage value to a predetermined voltage value greater than a ground voltage but less than a holding voltage, the holding voltage being a voltage where current through the SCR increases as a voltage applied to the SCR increases from the holding voltage during the latch up condition;
- and
- after reducing the supply voltage to the anode of the SCR to the predetermined voltage value greater than the ground voltage and waiting for a single event latch-up to clear, restoring the supply voltage to the anode of the SCR to the nominal voltage value.
2 more elements
A semiconductor device comprising:
- a first circuit block configured with a parasitic silicon-controlled rectifier (SCR) and arranged to receive a first voltage supply signal applied at an anode of the SCR;
- and
- a power management unit configured and arranged to:
- provide the first voltage supply signal to the first circuit block,
- measure current of the first circuit block,
- reduce the first voltage supply signal from a nominal voltage value to a predetermined voltage value greater than a ground voltage based on the measured current exceeding a first threshold set based on a quiescent mode current and indicative of when the SCR turns on and enters into a latch up condition, the predetermined voltage being less than a holding voltage where current through the SCR increases as a voltage applied to the SCR increases from the holding voltage during the latch up condition, and
- restore the first voltage supply signal to the nominal voltage value after reducing the first voltage supply signal to the predetermined voltage value greater than the ground voltage and waiting for a single-event latch up to clear.
4 more elements
A method comprising:
- providing, by way of a power management unit, a first voltage supply signal to a first circuit block of a semiconductor device which comprises a parasitic silicon-controlled rectifier (SCR);
- measuring a current of the first circuit block;
- reducing the first voltage supply signal from a nominal voltage value to a predetermined voltage value greater than a ground voltage based on the measured current exceeding a first threshold set based on a quiescent mode current and indicative of when the SCR turns on and enters into a latch up condition, the predetermined voltage being less than a holding voltage where current through the SCR increases as a voltage applied to the SCR increases from the holding voltage during the latch up condition;
- and
- restoring the first voltage supply signal to the nominal voltage value after reducing the first voltage supply signal to the predetermined voltage value greater than the ground voltage and waiting for a single event latch-up to clear.
2 more elements
Dependencies are inferred from the claim text.