Integrated circuit including flash memory and CMOS logic circuitry
AssigneeTexas Instruments Incorporated
InventorsGiulio Albini, Jonathan Lane
Life of this patent
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Abstract
An integrated circuit (IC) including Flash memory and CMOS logic circuitry and a method of fabrication thereof is disclosed. The IC comprises a substrate including a recessed area of a first region, a Flash memory cell gate stack formed in the recessed area, a wordline (WL) transistor formed in the recessed area and coupled with the Flash memory cell gate stack, the WL transistor including a WL gate formed over a first gate oxide layer exclusive of nitridation, and a transistor formed in a second area of the substrate separate from the recessed area, the transistor forming at least a portion of logic circuitry of the IC and including a second gate oxide layer having nitridation.
Claims22
An integrated circuit (IC), comprising:
- a substrate including a first area;
- a Flash memory cell gate stack formed in the first area;
- a wordline (WL) transistor formed in the first area and coupled with the Flash memory cell gate stack, the WL transistor including a WL gate formed over a first gate oxide layer;
- a transistor formed in a second area of the substrate separate from the first area, the transistor forming at least a portion of logic circuitry of the IC and including a second gate oxide layer, wherein the transistor includes a silicon-germanium (SiGe) layer;
- and
- one or more sets of transistors formed in the second area including the transistor, each set of transistors operable at respective voltage levels.
A method of fabricating an integrated circuit (IC), comprising:
- forming a first area in a substrate;
- forming a Flash memory cell gate stack in the first area;
- forming a wordline (WL) transistor in the first area, the WL transistor coupled with the Flash memory cell gate stack, wherein the WL transistor includes a WL gate formed over a first gate oxide layer;
- forming a transistor in a second area of the substrate separate from the first area, the transistor forming at least a portion of logic circuitry of the IC and including a second gate oxide layer, wherein the transistor includes a silicon-germanium (SiGe) layer;
- and
- forming one or more sets of transistors in the second area including the transistor, each set of transistors operable at respective voltage levels.
Dependencies are inferred from the claim text.