Memory device of the phase-change type and method for reading such a device
AssigneeSTMicroelectronics International N.V.
InventorsXavier Lecoq, Alin Razafindraibe, Christophe Forel
Life of this patent
Estimating the term…
Abstract
A phase-change memory cell to be read is associated with a phase-change reference memory cell placed in a SET state. The reference memory cell has a structure that is identical to that of the memory cell. A first voltage is applied to the memory cell to cause output of a first current. A second voltage is applied to the reference memory cell to cause output of a second current. A sense amplifier is coupled to the memory cell and to the reference memory cell and is configured to compare respective values of the first current and of the second current and generate output information representative of the logic value of the datum stored by the memory cell.
Claims18
A memory device of the phase-change type, comprising:
- a phase-change memory cell configurable into having a SET state and a RESET state which correspond, respectively, to first and second logic values of a datum stored in the memory cell and to first and second corresponding values of current output by the phase-change memory cell;
- a phase-change reference memory cell placed in the SET state, wherein the phase-change reference memory cell has a structure that is identical to the phase-change memory cell;
- and
- a circuit configured to read the stored datum, the circuit including:
- a first voltage generator circuit that applies a first voltage to a first bit line coupled to the phase-change memory cell, wherein the phase-change memory cell generates a first current on the first bit line;
- a second voltage generator circuit that applies a second voltage, different from the first voltage, to a second bit line coupled to the phase-change reference memory cell, wherein the phase-change reference memory cell in the SET state generates to a second current on the second bit line having a value that lies between said first and second corresponding values of current;
- and
- a sense amplifier having a first input coupled to the first bit line and a second input coupled to the second bit line cell and configured to output information representative of the logic value of the datum depending on a comparison of the first current and the second current.
A method for reading a memory device of phase-change type that includes a phase-change memory cell configurable into having a SET state and a RESET state which correspond, respectively, to first and second logic values of a datum stored in the memory cell and to first and second corresponding values of current output by the phase-change memory cell, the method comprising:
- placing a phase-change reference memory cell in the SET state, wherein the phase-change reference memory cell has a structure that is identical to the phase-change memory cell;
- applying a first voltage to a first bit line coupled to the phase-change memory cell;
- generating by the phase-change memory cell a first current on the first bit line;
- applying a second voltage, different from the first voltage, to a second bit line coupled to the phase-change reference memory cell;
- generating by the phase-change reference memory cell in the SET state to a second current on the second bit line having a value that lies between said first and second corresponding values of current;
- and
- comparing the first current to the second current and outputting information representing the logic value of the datum depending on the first current and the second current.
A memory device, comprising:
- a phase-change memory cell coupled to a first bit line;
- wherein the phase-change memory cell is programmable to store a datum;
- a phase-change reference memory cell coupled to a second bit line and having a structure that is identical to the phase-change memory cell;
- wherein the phase-change reference memory cell is programmed into a SET state;
- a first voltage generator that applies a first voltage to the first bit line;
- a second voltage generator that applies a second voltage, different from the first voltage, to the second bit line;
- wherein a level of the second voltage is less than a level of the first voltage;
- and
- a sense amplifier that compares a first current output by the phase-change memory cell on the first bit line in response to the first voltage to a second current output by the phase-change reference memory cell on the second bit line in response to the second voltage to generate an output indicative of the datum stored by the phase-change memory cell.
Dependencies are inferred from the claim text.