Memory device for wafer-on-wafer formed memory and logic
AssigneeMicron Technology, Inc.
InventorsGlen E. Hush, Sean S. Eilert, Aliasger T. Zaidy, Kunal R. Parekh
Life of this patent
Estimating the term…
Abstract
A memory device includes an array of memory cells configured on a die or chip and coupled to sense lines and access lines of the die or chip and a respective sense amplifier configured on the die or chip coupled to each of the sense lines. Each of a plurality of subsets of the sense lines is coupled to a respective local input/output (I/O) line on the die or chip for communication of data on the die or chip and a respective transceiver associated with the respective local I/O line, the respective transceiver configured to enable communication of the data to one or more device off the die or chip.
Claims20
An apparatus, comprising:
- an array of memory cells configured on a memory die;
- and
- a respective transceiver associated with a respective local I/O line of the memory die, the respective transceiver configured to enable communication of data to one or more devices off the memory die, wherein:
- the respective transceiver is configured to route the data to the one or more devices off the memory die through the respective local I/O line in response to receipt of a first signal from a controller;
- and
- the respective transceiver is configured to route the data to one or more devices off the memory die through a wafer-on-wafer bond in response to the respective transceiver receiving a second signal from the controller.
An apparatus, comprising:
- a plurality of tiles coupled to a global input/output (I/O) bus, wherein each tile includes a respective array of memory cells configured on a respective memory die;
- and
- a respective transceiver associated with a respective local I/O line and a wafer-on-wafer bond, wherein:
- the respective transceiver is configured to enable communication of data off the respective memory die via the respective local I/O line in response to receipt of a first signal from a controller;
- and
- the respective transceiver is configured to enable communication of the data off the respective memory die via the wafer-on-wafer bond in response to receipt of a second signal from the controller.
A method, comprising:
- receiving a control signal to switch a memory device between:
- a first mode of operation, wherein the first mode of operation configures the memory device for communication of data on a memory die via local input/output lines;
- and
- a second mode of operation, wherein the second mode of operation configures the memory device for communication of data to one or more devices off the memory die via a wafer-on-wafer bond;
- and
- transferring a signal indicative of data from a multiplexor configured on the memory die to circuitry internal to the memory device or circuitry external to the memory device based on whether the memory device is configured in the first mode of operation or the second mode of operation.
Dependencies are inferred from the claim text.