Three-dimensional memory devices and fabricating methods thereof

A method of forming a memory device, comprising:

• forming a memory array structure comprising a plurality of memory banks, each of the memory banks comprising a plurality of memory groups, each memory group having at least one memory block, comprising:
• arranging a subset of the plurality of memory groups in a row along a first lateral direction;
• forming a peripheral structure, comprising:
• forming a plurality of memory-group-driver circuits each corresponding to one of the plurality of memory groups, respectively;
• forming a plurality of memory-group-driver-interconnect lines configured to couple with a corresponding memory-group-driver circuit and one parity of word lines;
• arranging the memory-group-driver-interconnect lines coupled with the memory-group-driver circuits of the subset of the plurality of memory groups in a same subset of horizontal routing channels along the first lateral direction;
• and
• bonding the memory array structure and the peripheral structure, such that each memory-group-driver circuit is coupled with word lines of the at least one memory block of a corresponding one of the plurality of memory groups, and overlaps with one of the at least one memory block in a vertical direction.

A memory system, comprising:

• a memory device, comprising:
• a memory array structure comprising a plurality of memory banks, each of the memory banks comprising a plurality of memory groups, each memory group having at least one memory block, and
• a peripheral structure stacked with the memory array structure in a vertical direction, and comprising a plurality of memory-group-driver circuits each corresponding to one of the plurality of memory groups, respectively, the peripheral structure comprising:
• a plurality of memory-group-driver-interconnect lines coupled with a corresponding memory-group-driver circuit and one parity of word lines,
• wherein each memory-group-driver circuit is coupled with word lines of the at least one memory block of a corresponding one of the plurality of memory groups, and overlaps with one of the at least one memory blocks in the vertical direction;
• and
• wherein a subset of the plurality of memory groups is arranged in a row along a first lateral direction, and the plurality of memory-group-driver-interconnect lines coupled with the corresponding memory-group-driver circuit of the subset of the plurality of memory groups are arranged in a same subset of horizontal routing channels along the first lateral direction;
• and
• a memory controller coupled with the memory device and configured to control the memory device.