Dynamic ordering of design rule checks

A system comprising:

• a memory storing instructions;
• and
• a processor, coupled with the memory and to execute the instructions, the instructions when executed cause the processor to:
• classify a cell using a machine leaning model based on one or more cell features and one or more environment features of the cell;
• selecting an order of design rule checkers based on the classification of the cell;
• and
• perform design rule checks on the cell based on the selected order of design rule checkers.

A non-transitory computer-readable medium comprising stored instructions, which when executed by a processor, cause the processor to:

• receive an integrated circuit design comprising a plurality of cells;
• perform a first plurality of design rule checks on a first portion of the plurality of cells of the integrated circuit design based on a sequence of design rule checkers arranged in a first order;
• collect data on the execution of the design rule checkers on the first portion of the plurality of cells;
• update, by the processor, the sequence of design rule checkers, based on the data, to a second order of design rule checkers different from the first order;
• and
• perform a second plurality of design rule checks on a second portion of the plurality of cells of the integrated circuit design based on the sequence of design rule checkers arranged in the second order.