System-on-chip and electronic device including the same

A system-on-chip comprising:

• a host central processing unit (CPU);
• and
• a secure element comprising:
• an encryption circuit configured to generate encryption keys;
• a secure CPU configured to generate encrypted data by encrypting general data using the encryption keys;
• an internal memory configured to store the encrypted data;
• an one-time programmable (OTP) memory configured to store one or more of the encryption keys and a unique identifier (UID) used in the secure element;
• an attack detection circuit configured to detect whether an external attack on the encrypted data has occurred;
• an internal bus comprising:
• a bus permission switch configured to select, based on an access key, a target device within the secure element to which the encrypted data is to be transmitted, and
• an interconnect configured to transmit the encrypted data and an error detecting tag within the secure element, and
• a tag checker configured to determine whether the encrypted data attached with the error detection tag is abnormal;
• and
• an external bus configured to transmit the encrypted data outside the secure element to the target device.

An electronic device comprising:

• a system-on-chip comprising:
• a host central processing unit (CPU), and
• a secure element comprising an internal bus, the internal bus comprising:
• a bus permission switch,
• an interconnect, and
• a tag checker;
• and
• an external memory configured to communicate encrypted data with the secure element,
• wherein the secure element is configured to:
• generate a first encryption tag based on general data and an encryption parameter,
• generate the encrypted data by attaching the first encryption tag to the general data,
• transmit the encrypted data to the external memory, and wherein the external memory is further configured to store the encrypted data, and wherein, based on receiving the encrypted data from the external memory:
• the internal bus of the secure element is configured to:
• obtain restored data by decrypting the encrypted data, and
• generate a second encryption tag based on the restored data and the encryption parameter,
• the bus permission switch is configured to select a destination device to which the received encrypted data is to be transmitted,
• the interconnect is configured to transmit to the destination device the received encrypted data and the second encryption tag;
• and
• the tag checker is configured to determine whether the encrypted data attached with the second encryption tag is abnormal and output an abnormality alarm to the host CPU based on the first encryption tag being different to the second encryption tag.