Multiple channel direct access memory-based configuration system

A method, comprising:

• determining, using a processor, that one or more buffers in a host memory of a host device store configuration data to configure a field programmable gate array of a field programmable gate array device;
• determining, by direct memory access engine of the field programmable gate array device, whether credits are available in an available credits buffer of direct memory access engine, wherein the available credits indicate how much data the programmable logic device is capable of servicing;
• in response to determining that there are available credits in the available credits buffer, pulling the configuration data from the one or more buffers via the direct memory access engine of the field programmable gate array;
• transmitting the configuration data from the host memory to programmable logic of the field programmable gate array;
• and
• based at least part on the transmission of the configuration data from the host memory to the programmable logic, writing back by a state machine of the field programmable gate array an indication of the available credits changing by an amount of configuration data transmitted from the host memory to the programmable logic.

A tangible, non-transitory, machine-readable medium, comprising machine-readable instructions that, when executed by one or more processors, cause the one or more processors to

• determine, using a processor, that one or more buffers in a host memory of a host device comprise configuration data to configure a field programmable gate array of a field programmable gate array device;
• pull the configuration data from the one or more buffers via a direct memory access engine of the field programmable gate array;
• partition the configuration data into one or more blocks of data each corresponding to a credit of configuration data to be transferred, wherein an available credits buffer of the direct memory access engine is updated by a state machine of the field programmable gate array device each time a block of the one or more blocks of data is transmitted from the processor to the field programmable gate array device to indicate a change in available resources of the field programmable gate array;
• and
• based at least in part on available credits indicated in the available credits buffer, transmit at least one of the one or more blocks of configuration data to programmable logic of the field programmable gate array.