Memory system
AssigneeKioxia Corporation
InventorsKengo Kurose, Masanobu Shirakawa, Marie Takada
Life of this patent
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Abstract
According to an embodiment, a memory controller obtains first data in a first page using a first voltage, obtains a first shift amount based on a first and second number. The first and second numbers represent numbers of bits each of which has different values in a first and second manner between the first data and first expected data. The controller obtains second data in the second page using a second voltage and a second shift amount, and obtains a third shift amount based on a third and fourth number, the third and fourth numbers respectively represent numbers of bits each of which has different values in the first and second manner between the second data and second expected data.
Claims18
A method of controlling a semiconductor memory including a word line and a plurality of memory cells connected to the word line, the method comprising:
- reading data of the memory cells as first data;
- performing error correction on the first data;
- and
- determining whether or not to perform a refresh operation of a block based on a number of error bits of the first data, a first number and a second number, the first number representing a number of bits each of which has different values in a first manner between the first data and first expected data obtained by the error correction on the first data, the second number representing a number of bits each of which has different values in a second manner between the first data and the first expected data, the block having the memory cells.
Dependencies are inferred from the claim text.