Embedded arithmetic blocks for structured ASICs
AssigneeAltera Corporation
InventorsSankaran Menon, Martin Langhammer, Mustansir Fanaswalla, Kuldeep Simha
Life of this patent
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Abstract
An integrated circuit is provided that includes via-configured structured logic circuitry and an embedded arithmetic block that interfaces with the via-configured structured logic circuitry to perform an arithmetic function. The embedded arithmetic block includes at least one monolithic arithmetic circuit that can perform the arithmetic function more efficiently or taking up less die space than a comparable circuit formed from the via-configured structured logic circuitry.
Claims20
An integrated circuit comprising:
- via-configured structured logic circuitry;
- and
- an embedded arithmetic block that interfaces with the via-configured structured logic circuitry to perform an arithmetic function, wherein the embedded arithmetic block comprises a plurality of monolithic arithmetic circuits, and wherein the via-configured structured logic circuitry comprises a via-configured feedback path that couples an output of the embedded arithmetic block with an input of the embedded arithmetic block.
An integrated circuit comprising:
- via-configured structured logic circuitry;
- and
- an embedded arithmetic block that interfaces with the via-configured structured logic circuitry to perform an arithmetic function, wherein the embedded arithmetic block comprises a plurality of monolithic arithmetic circuits, wherein the embedded arithmetic block comprises a multiplier, and wherein the embedded arithmetic block comprises a pre-adder to perform an addition function on data prior to multiplication by the multiplier.
An integrated circuit comprising:
- via-configured structured logic circuitry;
- and
- an embedded arithmetic block that interfaces with the via-configured structured logic circuitry to perform an arithmetic function, wherein the embedded arithmetic block comprises an plurality of monolithic arithmetic circuits, wherein the embedded arithmetic block comprises a multiplier, and wherein the via-configured structured logic circuitry comprises structured logic circuitry that has been via-configured to form a post-adder to perform an addition function using outputs of the multiplier.
An integrated circuit comprising:
- via-configured structured logic circuitry;
- and
- an embedded arithmetic block that interfaces with the via-configured structured logic circuitry to perform an arithmetic function, wherein the embedded arithmetic block comprises a plurality of monolithic arithmetic circuits, and wherein the embedded arithmetic block further comprises via-configured control circuitry that controls an operation of the plurality of monolithic arithmetic circuits.
Dependencies are inferred from the claim text.