Back to results
US 12,717,481 B2Granted
Non-deterministic memory protocol
OwnerRobert M. Walker, James A. Hall, Jr. +1inventors
InventorsRobert M. Walker, James A. Hall, Jr., Frank F. Ross
Life of this patent
Estimating the term…
Abstract
The present disclosure includes apparatuses and methods related to a non-deterministic memory protocol. An example apparatus can perform operations on the memory device based on commands received from a host according to a protocol, wherein the protocol includes non-deterministic timing of the operations. The memory device can be a non-volatile dual in-line memory module (NVDIMM) device.
Claims19
A method, comprising:
- receiving, from a host via a command/address bus of a non-volatile dual inline memory module (NVDIMM), at least one read command and at least one write command;
- receiving, from the host via a data bus of the NVDIMM, data to be written to the NVDIMM;
- transmitting, to the host from a set of pins of the NVDIMM designated for write credit signaling, a write credit signal that is based at least in part on the NVDIMM retiring the write command from a write buffer;
- and
- transmitting, to the host from the set of pins of the NVDIMM, a data packet that comprises a write credit feedback and data responsive to a read command received via the command/address bus.
2 more elements
An apparatus, comprising:
- a command/address bus configured to transmit read and write commands from a host to a volatile memory or a non-volatile memory, or both;
- a data bus configured to communicate data associated with a read command or a write command between the host and the volatile memory or the non-volatile memory, or both;
- and
- a set of pins that is separate from the command/address bus is coupled to the volatile memory or the non-volatile memory, or both, and configured to transmit a write credit signal to the host in response to retiring the write command from a write buffer, wherein the data bus and the set of pins are configured to transmit from the DIMM a data packet that comprises write credit feedback and data responsive to a read command received via the command/address bus.
1 more element
A method, comprising:
- transmitting, from a host to a non-volatile dual inline memory module (NVDIMM) via a command/address bus, at least one read command and at least one write command;
- transmitting, from the host to the NVDIMM via a data bus, data to be written to the NVDIMM;
- receiving, at the host from a set of pins of the NVDIMM designated for write credit signaling, a data packet that comprises a write credit signal that is based at least in part on the NVDIMM retiring the write command from a write buffer;
- and
- receiving, at the host from the set of pins of the NVDIMM, a data packet that comprises a write credit feedback and data responsive to a read command received via the command/address bus.
2 more elements
Dependencies are inferred from the claim text.