Modularized clock conditioning
AssigneeQUALCOMM Incorporated
InventorsWei Li, Lalitkumar Nathawad
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Abstract
Certain aspects of the present disclosure provide a clock conditioning circuit configurable with multiple operating modes to generate customized clock signals for a plurality of processing nodes. The clock conditioning circuit may include one or more first circuits, each configurable to monitor one or more parameters indicative of a condition of a first clock signal and to generate one or more control signals based on the monitoring and one or more second circuits, each configurable to generate a second clock signal by conditioning the first clock signal based on at least one of the one or more control signals generated by at least one of the one or more first circuits.
Claims20
An apparatus, comprising:
- a plurality of processing nodes;
- and
- a clock conditioning circuit configurable with multiple operating modes to generate customized clock signals for the plurality of processing nodes, the clock conditioning circuit including
- one or more first circuits, each configurable to monitor one or more parameters indicative of a condition of a first clock signal and to generate one or more control signals based on the monitoring;
- and
- one or more second circuits, each configurable to generate a second clock signal by conditioning the first clock signal based on at least one of the one or more control signals generated by at least one of the one or more first circuits.
A clock conditioning circuit configurable with multiple operating modes to generate customized clock signals, comprising:
- one or more first circuits, each configurable to monitor one or more parameters indicative of a condition of a first clock signal and to generate one or more control signals based on the monitoring;
- and
- one or more second circuits, each configurable to generate a second clock signal by conditioning the first clock signal based on at least one of the one or more control signals generated by at least one of the one or more first circuits.
A method for generating customized clock signals for a plurality of processing nodes, comprising:
- configuring one or more first circuits, each to monitor one or more parameters indicative of a condition of a first clock signal and to generate one or more control signals based on the monitoring;
- and
- configuring one or more second circuits, each to generate a second clock signal by conditioning the first clock signal based on at least one of the one or more control signals generated by at least one of the one or more first circuits.
Dependencies are inferred from the claim text.