Complementary architecture for verifying input data in redundant modules

A method, comprising:

• converting a first signal into a second signal via a first analog-to-digital converter (ADC) circuit;
• converting the first signal a third signal via a second ADC circuit;
• performing a first verification operation on the second signal based on the third signal via a first microcontroller unit;
• performing a second verification operation on the third signal based on the second signal via a second microcontroller unit;
• performing a first diagnostic operation on the first ADC circuit during a first duration of time;
• performing a second diagnostic operation on the second ADC circuit during a second duration of time, wherein the first duration of time and the second duration of time occur at different time periods;
• and
• generating a fourth signal based on a portion of the second signal and an additional portion the third signal, wherein the portion of the second signal excludes a first dataset that corresponds to the first duration of time, and wherein the additional portion of the third signal excludes a second dataset that corresponds to the second duration of time.

A system, comprising:

• a first analog-to-digital converter configured to receive a first analog signal and convert the first analog signal into a second digital signal;
• a second analog-to-digital converter configured to receive the first analog signal and convert the first analog signal into a third digital signal;
• a control system configured to:
• perform a verification operation on the second digital signal based on the third digital signal;
• perform a first diagnostic operation on the first analog-to-digital converter during a first duration of time;
• perform a second diagnostic operation on the second analog-to-digital converter during a second duration of time, wherein the first duration of time and the second duration of time occur at different time periods;
• disregard a first dataset from the first analog-to-digital converter during the first duration of time;
• receive first complement data from the second analog-to-digital converter during the first duration of time;
• receive second complement data from the first analog-to-digital converter during the second duration of time;
• and
• generate a fourth digital signal based on the second digital signal, the third digital signal, the first complement data, and the second complement data.