Array substrate, display device and driving circuit

An array substrate, comprising:

• a substrate;
• a pixel electrode layer, disposed on the substrate;
• a first insulating layer, disposed on the substrate and covering the pixel electrode layer;
• a plurality of data lines, disposed on the first insulating layer;
• and
• a second insulating layer, disposed on the first insulating layer and covering the plurality of data lines;
• a common electrode layer, disposed on the second insulating layer, the common electrode layer comprising a plurality of common shield electrode layers;
• and
• a plurality of data signal cancellation lines, disposed between the common electrode layer and the first insulating layer, wherein the plurality of data signal cancellation lines are disposed in one-to-one correspondence with the plurality of data lines;
• wherein a voltage signal of each of the plurality of data signal cancellation lines has an opposite polarity to a voltage signal of the respective data line;
• wherein each of the plurality of data signal cancellation lines is disposed along an extending direction of the respective data line;
• wherein in a direction from the pixel electrode layer toward the common electrode layer, each of the plurality of common shield electrode layers covers one respective data signal cancellation line and one respective data line;
• wherein a gap is defined between a projection of each data line along a direction perpendicular to the substrate and a projection of the respective data signal cancellation line along the direction perpendicular to the substrate, and wherein a width of the gap is greater than or equal to a preset distance;
• wherein each of the plurality of data signal cancellation lines comprises a first data signal cancellation line and a second data signal cancellation line;
• wherein the first data signal cancellation line is disposed on a left side of the data line and is spaced apart from the respective data line, and the second data signal cancellation line is disposed on a right side of the data line and is spaced from the data line;
• wherein the voltage signal of the first data signal cancellation line and the voltage signal of the second data signal cancellation line have identical polarities;
• wherein both the voltage signal of the first data signal cancellation line and the voltage signal of the second data signal cancellation line have an opposite polarity to the voltage signal of the respective data line.

A display device, comprising a color filter substrate and an array substrate, the color filter substrate and the array substrate being aligned and assembled together;

• wherein the array substrate comprises a substrate, a pixel electrode layer, a first insulating layer, a plurality of data lines, a second insulating layer, a common electrode layer, and a plurality of data signal cancellation lines;
• wherein the pixel electrode layer is disposed on the substrate;
• the first insulating layer is disposed on the substrate and covers the pixel electrode layer;
• the plurality of the data lines are disposed on the first insulating layer;
• the second insulating layer is disposed on the first insulating layer and covers the plurality of data lines;
• the common electrode layer is disposed on the second insulating layer, and comprises a plurality of common shield electrode layers;
• wherein the plurality of data signal cancellation lines are disposed between the common electrode layer and the first insulating layer, and wherein the plurality of data signal cancellation lines are disposed in one-to-one correspondence with the plurality of data lines;
• wherein a voltage signal of each of the plurality of data signal cancellation lines has an opposite polarity to a voltage signal of the respective data line;
• wherein each of the plurality of data signal cancellation lines is disposed along an extending direction of the respective data line;
• wherein in a direction from the pixel electrode layer toward the common electrode layer, each of the plurality of common shield electrode layers covers one respective data signal cancellation line and one respective data line;
• wherein a gap is defined between a projection of each data line and a projection of the respective data signal cancellation line, and wherein a width of the gap is greater than or equal to a preset distance;
• wherein each of the plurality of data signal cancellation lines is disposed in the second insulating layer, and is disposed in a different layer from the respective data line, wherein a distance from the data signal cancellation line to the first insulating layer is greater than a distance from the data line layer to the first insulating layer;
• wherein in a direction from the pixel electrode layer toward the common electrode layer, the gap formed between a vertical projection of each of the plurality of data lines along a direction perpendicular to the substrate and a vertical projection of the respective data signal cancellation line along the direction perpendicular to the substrate is equal to the preset distance, the preset distance being greater than or equal to zero and being less than or equal to a difference between a width of the common electrode layer and a total width of the respective data signal cancellation line and respective data line.