Semiconductor package including stacked chips and method of manufacturing the semiconductor package

A semiconductor package, comprising:

• a first semiconductor chip including a substrate having a first upper surface and a first lower surface opposite to the first upper surface, the substrate having a central region and edge regions surrounding the central region, a plurality of through electrodes penetrating through the central region of the substrate, a bonding pad electrically connected to the through electrode and having a first height from the first upper surface, and a plurality of dummy pads respectively extending from the first upper surface on the edge regions of the substrate and having a second height that is higher than the first height;
• a second semiconductor chip having a second upper surface and a second lower surface opposite to the second upper surface, the second semiconductor chip disposed on the first semiconductor chip via conductive bumps that are disposed on the second lower surface and are electrically connected to the bonding pads;
• and
• an adhesive configured to fill a space between the first and second semiconductors in the central region excluding corner regions of the substrate.