Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsHyeonjeong Hwang, Kyoung Lim Suk, Inhyung Song
Life of this patent
Estimating the term…
Abstract
A semiconductor package may include a first redistribution substrate, a semiconductor chip disposed on the first redistribution substrate, a mold layer covering the semiconductor chip and including a first opening exposing a portion of a top surface of the semiconductor chip, a first passive device disposed on the portion of the top surface of the semiconductor chip exposed by the first opening, an insulating pattern filling the first opening and covering at least a portion of the first passive device, and a second redistribution substrate disposed on the mold layer. The first passive device may be spaced apart from the mold layer, with the insulating pattern interposed therebetween.
Claims20
A semiconductor package, comprising:
- a first redistribution substrate comprising first insulating layers and first redistribution patterns provided in the first insulating layers;
- a semiconductor chip on the first redistribution substrate;
- a mold layer covering the semiconductor chip and including a first opening exposing a portion of a top surface of the semiconductor chip;
- a first passive device on the portion of the top surface of the semiconductor chip exposed by the first opening;
- an insulating pattern filling the first opening and covering at least a portion of the first passive device;
- and
- a second redistribution substrate on the mold layer, the second redistribution substrate comprising second insulating layers and second redistribution patterns provided in the second insulating layers,
- wherein the first passive device is spaced apart from the mold layer, with the insulating pattern interposed therebetween.
A semiconductor package, comprising:
- a first redistribution substrate;
- a semiconductor chip on the first redistribution substrate;
- a mold layer covering the semiconductor chip and including an opening exposing a portion of a top surface of the semiconductor chip;
- a first passive device on the portion of the top surface of the semiconductor chip exposed by the opening, the first passive device including a first conductive terminal, a second conductive terminal, and a first insulating material between the first and second conductive terminals;
- an insulating pattern filling the opening and covering at least a portion of the first passive device;
- and
- a second redistribution substrate on the mold layer,
- wherein the second redistribution substrate includes:
- insulating layers;
- and
- redistribution patterns and first terminal wiring patterns provided in the insulating layers,
- wherein the first and second conductive terminals are coupled to the first terminal wiring patterns, respectively.
A semiconductor package, comprising:
- a lower package;
- and
- an upper package on the lower package,
- wherein the lower package includes:
- a first redistribution substrate;
- a first semiconductor chip on the first redistribution substrate;
- a conductive post on the first redistribution substrate, the conductive post being laterally spaced apart from the first semiconductor chip;
- a first mold layer covering the first semiconductor chip and including a first opening, which exposes a portion of a top surface of the first semiconductor chip;
- a passive device on the portion of the top surface of the first semiconductor chip exposed by the first opening;
- and
- an insulating pattern filling the first opening of the first mold layer and covering at least a portion of the passive device,
- wherein the upper package includes:
- a second redistribution substrate, the second redistribution substrate including redistribution patterns and terminal wiring patterns;
- a second semiconductor chip on the second redistribution substrate;
- and
- a second mold layer covering the second semiconductor chip,
- wherein the passive device is spaced apart from the first mold layer, with the insulating pattern interposed therebetween, and
- the terminal wiring patterns are coupled to the passive device.
Dependencies are inferred from the claim text.