Semiconductor device assemblies with coplanar interconnect structures, and methods for making the same

A semiconductor device assembly, comprising:

• a substrate, including:
• an inner surface and an outer surface;
• a plurality of vertical stacks of semiconductor devices disposed on the inner surface and extending above the inner surface by a first distance, each vertical stack of semiconductor devices comprising one or more memory dies;
• a central interconnect structure disposed between the plurality of vertical stacks of semiconductor devices on the inner surface and extending above the inner surface by a second distance greater than the first distance, including:
• a plurality of conductors and a sheath of dielectric material that surrounds and electrically isolates each of the plurality of conductors, each of the plurality of conductors electrically coupled to a corresponding one of the plurality of semiconductor devices;
• a plurality of peripheral interconnect structures disposed around the vertical stacks of semiconductor devices on the inner surface, each of the peripheral interconnect structures in the plurality electrically coupled to at least one of the semiconductor devices, each of the plurality of peripheral interconnect structures extending above the inner surface by the second distance;
• and
• an encapsulant material at least partially encapsulating the devices and the interconnects, wherein the encapsulant comprises a different material than the dielectric material,
• wherein the central and peripheral interconnect structures electrically couple the plurality of semiconductor devices to each other, or to an electrically conductive structure disposed at the inner surface of the substrate, or to both.