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US 12,713,708 B2Granted
ESD protection circuit for negative voltage operation
AssigneeMediatek Inc.
InventorsMing-Chun Chen, Bo-Shih Huang
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Abstract
The present invention provides a chip including an I/O pin and an ESD protection circuit. The ESD protection circuit includes a P-type device and a first diode, wherein the P-type device is coupled between the I/O pin and a ground voltage, and an anode of the first diode is directly connected to the I/O pin. In addition, the ESD protection circuit does not comprise any device whose N-type doping/diffusion is directly connected to the I/O pin.
Claims8
A chip, comprising:
- an input/output (I/O) pin;
- an electrostatic discharge (ESD) protection circuit comprising a P-type device and a first diode, wherein the P-type device is coupled between the I/O pin and a ground voltage, and an anode of the first diode is directly connected to the I/O pin;
- wherein the ESD protection circuit does not comprise any device whose N-type doping/diffusion is directly connected to the I/O pin;
- wherein the I/O pin is used to receive a negative voltage from a device external to the chip during a normal operating state, and the negative voltage is lower than the ground voltage;
- and the P-type device is disabled when the I/O pin has the negative voltage.
2 more elements
Dependencies are inferred from the claim text.