Power gating cell structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWei-Ling Chang, Jung-Chan Yang, Li-Chun Tien, Ting Yu Chen
Life of this patent
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Abstract
A power gating cell on an integrated circuit is provided. The power gating cell includes: a central area; a peripheral area surrounding the central area; a first active region located in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction; and a plurality of second active regions located in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction.
Claims20
A power gating cell on an integrated circuit, comprising:
- a central area;
- a peripheral area adjacent the central area;
- a first active region located in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction;
- a plurality of second active regions located in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction;
- and
- a third active region located in the central area, the third active region separated from the first active region and having a third width in the first direction corresponding to at least four fin structures extending in the second direction perpendicular to the first direction,
- wherein the power gating cell is a header cell configured to cut off a power supply to a standard logic cell on the integrated circuit in response to a control signal.
A power gating cell on an integrated circuit, comprising:
- a central area;
- a peripheral area adjacent the central area;
- a first active region located in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction;
- a plurality of second active regions located in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction;
- and
- a third active region located in the central area, the third active region separated from the first active region and having a third width in the first direction corresponding to at least four fin structures extending in the second direction perpendicular to the first direction,
- wherein the power gating cell is a footer cell configured to cut off a power supply to a standard logic cell on the integrated circuit in response to a control signal.
A power gating cell on an integrated circuit, comprising:
- a central area;
- a peripheral area adjacent the central area;
- a first active region located in the central area, the first active region having a first width in a first direction corresponding to at least four fin structures extending in a second direction perpendicular to the first direction;
- a plurality of second active regions located in the peripheral area, each second active region having a second width in the first direction corresponding to at least one and no more than three fin structures extending in the second direction;
- and
- a third active region located in the central area, the third active region separated from the first active region and having a third width in the first direction corresponding to at least four fin structures extending in the second direction perpendicular to the first direction.
Dependencies are inferred from the claim text.