Trench isolation with conductive structures

A semiconductor structure, comprising:

• first and second semiconductor fin structures on a substrate;
• a gate dielectric layer on the first and second semiconductor fin structures, wherein the gate dielectric layer is in contact with top and sidewall surfaces of the first and second semiconductor fin structures;
• a first work function stack on the gate dielectric layer over the first semiconductor fin structure;
• a second work function stack on the gate dielectric layer over the second semiconductor fin structure;
• and
• a barrier structure on the first and second semiconductor fin structures, wherein the barrier structure is in contact with a top surface of the gate dielectric layer and sidewall surfaces of the first and second work function stacks.

A semiconductor device, comprising:

• a first transistor comprising a first channel structure and a first work function stack on a first portion of a gate dielectric layer, wherein the gate dielectric layer is in contact with top and sidewall surfaces of the first channel structure;
• a second transistor comprising a second channel structure and a second work function stack on a second portion of the gate dielectric layer, wherein the gate dielectric layer is in contact with top and sidewall surfaces of the second channel structure;
• and
• a conductive structure on the first and second channel structures and at a boundary of the first and second portions of the gate dielectric layer, wherein the conductive structure is in contact with the gate dielectric layer and separates the first and second work function stacks.