Gate structures in semiconductor devices

A method, comprising:

• forming first and second nanostructured channel regions;
• forming first and second gate openings surrounding the first and second nanostructured channel regions, respectively;
• performing an oxidation process on exposed surfaces of the first and second nanostructured channel regions in the first and second gate openings, respectively;
• depositing a diffusion barrier layer with first and second barrier portions in the first and second gate openings, respectively;
• performing a doping process on the first and second barrier portions to form first and second doped barrier portions with first and second metal dopants, respectively, wherein performing the doping process comprises:
• depositing, on the first barrier portion, a first dopant source layer with a first metal oxide that is different from a metal oxide of the diffusion barrier layer;
• and
• depositing, on the second barrier portion, a second dopant source layer with a second metal oxide that is different from the first metal oxide and the metal oxide of the diffusion barrier layer;
• and
• depositing a conductive layer on the first and second doped barrier portions.

A method, comprising:

• depositing an oxide layer on a channel region;
• depositing a diffusion barrier layer on the oxide layer;
• depositing a high-k dielectric layer on the diffusion barrier layer;
• performing a doping process on the diffusion barrier layer and the high-k dielectric layer to form a doped diffusion barrier layer with a first dopant concentration and a doped high-k dielectric layer with a second dopant concentration lower than the first dopant concentration;
• and
• depositing a conductive layer on the doped high-k dielectric layer.