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US 12,713,677 B2Granted
Semiconductor device and method of manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWan-Yi Kao, Chunyao Wang, Yung-Cheng Lu, Yong-Yan Lu, Ming-Han Chung
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Abstract
Semiconductor devices and methods of manufacturing are presented in which a first spacer layer and a second spacer layer are formed. In embodiments the first spacer layer and the second spacer layer are formed with an enhanced etch resistance. Such an enhanced etch resistance works to help prevent undesired breakthroughs during subsequent manufacturing processes.
Claims20
A method of manufacturing a semiconductor device, the method comprising:
- depositing a gate structure over a semiconductor substrate;
- depositing a first spacer layer adjacent to the gate structure, the first spacer layer comprising SiOCN, wherein the depositing the first spacer layer comprises:
- depositing a first portion of the first spacer layer;
- treating the first portion of the first spacer layer;
- after the treating the first portion depositing a second portion of the first spacer layer in physical contact with the first portion of the first spacer layer;
- and
- treating the second portion of the first spacer layer;
- depositing a second spacer layer in physical contact with the first spacer layer, the second spacer layer comprising SiOC;
- and
- exposing a surface of the first spacer layer opposite the second spacer layer.
7 more elements
A method of manufacturing a semiconductor device, the method comprising:
- depositing SiOCN to a thickness of between about 20 Å and about 30 Å in physical contact with a gate structure, wherein the depositing the SiOCN comprises:
- depositing a first portion of the SiOCN;
- treating the first portion of the SiOCN;
- after the treating the first portion depositing a second portion of the SiOCN in physical contact with the first portion of the SiOCN;
- and
- treating the second portion of the SiOCN;
- and
- depositing SiOC to a thickness of between about 29 Å and about 45 Å in physical contact with the SiOCN, wherein the depositing the SiOC is performed at least in part with a second cyclical deposition and treatment process.
5 more elements
A semiconductor device comprising:
- a gate electrode surrounding at least one nanowire;
- a first spacer layer adjacent to the gate electrode, the first spacer layer comprising SiOCN, the SiOCN having a density of at least 2.4 g/cm3 and a k-value of at least 4.7;
- and
- a second spacer layer in physical contact with the first spacer layer, the second spacer layer comprising SiOC, the SiOC having a density of at least 2.5 g/cm3 and a k-value of between about 4.7 and about 4.9.
1 more element
Dependencies are inferred from the claim text.