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US 12,713,675 B2Granted
Method of manufacturing ohmic contacts of an electronic device, with thermal budget optimization
AssigneeSTMicroelectronics S.r.l.
InventorsMario Giuseppe Saggio, Cateno Marco Camalleri, Gabriele Bellocchi, Simone Rascuna′
Life of this patent
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Abstract
Method of manufacturing an electronic device, comprising forming an ohmic contact at an implanted region of a semiconductor body. Forming the ohmic contact provides for performing a high-temperature thermal process for allowing a reaction between a metal material and the material of the semiconductor body, for forming a silicide of the metal material. The step of forming the ohmic contact is performed prior to a step of forming one or more electrical structures which include materials that may be damaged by the high temperature of the thermal process of forming the silicide.
Claims20
A method of manufacturing an electronic device, comprising:
- forming, in a semiconductor body of Silicon Carbide, a first implanted region which extends into the semiconductor body facing a first side of the semiconductor body;
- forming, in contact with the semiconductor body at the first implanted region, a reaction layer of a metal material;
- forming an ohmic contact at the first implanted region, by performing a thermal process for allowing a reaction between the metal material and the semiconductor body at the first implanted region for forming a silicide of the metal material;
- forming a stack of protection layers on the first side of the semiconductor body, the stack of protection layers being aligned with the first implanted region;
- and
- forming one or more electrical structures of the electronic device, the electrical structures including:
- a gate dielectric on the semiconductor body and covering the stack of protection layers;
- a conductive layer on the gate dielectric;
- a metallization having a first portion bisecting the stack of protection layers, the first portion of the metallization being aligned with the ohmic contact;
- and
- an insulating layer entirely separating the gate dielectric, the conductive layer, and stack of protection layers from the metallization,
- wherein the forming the ohmic contact is performed prior to the forming the one or more electrical structures of the electronic device.
9 more elements
A method, comprising:
- forming a first source region in a first side of a semiconductor body,
- forming a metal layer coupled to the first source region and the first side of the semiconductor body;
- forming a first ohmic contact in the first source region;
- forming a first stack of protection layers on the first side of the semiconductor body on the ohmic contact;
- forming a gate dielectric layer directly on the first side of the semiconductor body and on the first stack of protection layers;
- forming a conductive layer on the gate dielectric layer;
- forming a first opening through the gate dielectric layer, the conductive layer, and the first stack of protection layers, the first opening exposing the first ohmic contact;
- forming a first insulating layer covering the gate dielectric layer and the conductive layer;
- forming a metallization layer on the first insulating layer, the metallization layer being coupled to the first ohmic contact, the first insulating layer entirely separating the gate dielectric, the conductive layer, and the first stack of protection layers from the metallization layer;
- and
- forming a second insulating layer on the metallization layer, the second insulating layer having a first sidewall coplanar with the first sidewall of the first insulating layer and second sidewall coplanar with the second sidewall of the first insulating layer.
8 more elements
A method, comprising:
- forming a first body well in a first side of a semiconductor body, the first body well having a first side coplanar with the first side of the semiconductor body;
- forming a first source region in the first body well, the first source region having a first side coplanar with the first side of the semiconductor body;
- forming a first implanted region in the first source region, the first implanted region having a first side coplanar with the first side of the semiconductor body;
- forming a deposition mask layer on the first side of the semiconductor body, the deposition mask layer having a first opening exposing the first source region;
- forming a metal layer on the deposition mask layer, the metal layer being coupled to the first source region through the first opening in the deposition mask layer;
- forming a first ohmic contact in the first source region;
- forming a first protection layer on the first ohmic contact;
- forming a second protection layer on the first protection layer;
- forming a gate dielectric layer on the first side of the semiconductor body, the gate dielectric layer covering and being directly on the first side of the first source region;
- forming a conductive layer on the gate dielectric layer;
- exposing the first ohmic contact by forming a first opening entirely through the conductive layer, the gate dielectric layer, and the first and second protection layers;
- forming an insulating layer on the first and second protection layers, the gate dielectric layer, and the conductive layer, the insulating layer being directly on the first side of the semiconductor body on the first source region;
- and
- forming a first metallization on the insulating layer, the first metallization extending in the first opening and being coupled to the first ohmic contact.
11 more elements
Dependencies are inferred from the claim text.