Memory device memory including an antifuse cell array
AssigneeSamsung Electronics Co., Ltd.
InventorsChangyoung Lee, Hyun-Chul Yoon, Yeongwoo Kang
Life of this patent
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Abstract
The present disclosure relates to memory devices. An example memory device includes a memory cell region including a memory cell array is configured to store data, and an antifuse cell array including a plurality of antifuse bit lines, a plurality of antifuse word lines, and a plurality of program transistors that is electrically coupled to a first antifuse bit line among the plurality of antifuse bit lines and that are coupled in parallel with one another. The memory device includes a peripheral circuit region including an antifuse sense amplifier is configured to output one-time programmable (OTP) data stored in the plurality of program transistors.
Claims8
A memory device comprising:
- a memory cell region, the memory cell region including:
- a memory cell array that is configured to store data, and
- an antifuse cell array that includes an antifuse cell;
- and
- a peripheral circuit region, wherein at least a portion of the peripheral circuit region overlaps the memory cell region in a plan view, the peripheral circuit region is stacked with the memory cell region in a vertical direction, and the peripheral circuit region includes an antifuse sense amplifier that is configured to output one-time programmable (OTP) data stored in the antifuse cell.
Dependencies are inferred from the claim text.