# US 12,713,276 B2 · Sixty gigahertz multiple input multiple output transceiver > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,713,276 B2 - Document ID: US12713276B2 - Status: Granted - Kind: B2 - Application number: 19/441,167 - Filed: 2026-01-06 - Published: 2026-05-07 - Granted: 2026-08-18 - Earliest claimed: 2024-07-18 - Assignees: Tensorcom, Inc. - Applicants: Tensorcom, LLC - Inventors: Patrick Soon-Shiong; Vincent Dang; Zaw Soe - Web page: https://patentgrep.com/patent/US12713276B2 ## CPC - H04B 1/40: Circuits - H04W 28/0231: {based on communication conditions (dynamic wireless traffic scheduling definition based on channel quality criteria H04W72/54)} - G06F 13/4221: {being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus} - G06F 13/28: using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) - G06F 13/4282: {on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247)} - G06F 2213/0026: PCI express - H04W 88/085: {Access point devices with remote components} - H04B: TRANSMISSION - H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract An example system-on-chip (SoC) device for a communication system includes a peripheral component interconnect express (PCIe) interface configured to receive data from a backhaul field programmable gate array (FPGA) of the communication system, and a producer port linked with a consumer port through direct memory access (DMA). Data received by the PCIe interface is assigned to the producer port. The device includes dual hardware media access controls (MACs) configured to consume the data assigned to the producer port, and at least one processor configured to supply the data to a wireless interface for transmission to another wireless communication device of the communication system at a frequency of at least sixty Gigahertz. ## Claims ### Claim 1 A system-on-chip (SoC) device for a communication system, the SoC device comprising: a first communication interface configured to receive data in the communication system; a producer port linked with a consumer port through direct memory access (DMA), wherein data received by the first interface is assigned to the producer port; dual hardware media access controls (MACs) configured to consume the data assigned to the producer port; and at least one processor configured to supply the data to a wireless interface for transmission to another wireless communication device of the communication system at a frequency of at least sixty Gigahertz, wherein the wireless interface includes at least one beamforming chip configured to transmit wireless communication signals, wherein an aggregation layer of the SoC device is configured to synchronize the dual MACs and reassemble two independent MAC data streams into a single data stream, wherein the aggregation layer is configured to reorder out-of-order data frames using 802.11 protocol sequence numbers, committing only in-order frames to a next processing step and holding out-of-order data frames until they can be reordered or a timeout occurs, and wherein the at least one processor is configured to reduce a specified modulation rate in response to an out-of-order frame arrival rate increasing above a specified degradation threshold, and increase the specified modulation rate in response to the out-of-order frame arrival rate decreasing below the specified degradation threshold. ### Claim 2 (depends on 1) The SoC device of claim 1, wherein the first interface is configured to receive the data from a distributed unit of a fronthaul communication system architecture, wherein the distributed unit is in communication with a core network of the communication system. ### Claim 3 (depends on 1) The SoC device of claim 1, wherein the first interface is configured to receive the data from a radio unit of a fronthaul communication system architecture, wherein: the radio unit is electrically coupled with at least one cellular antenna; and the radio unit is configured to transmit and receive wireless cellular signals. ### Claim 4 (depends on 1) The SoC device of claim 1, wherein, the other wireless communication device includes: a second interface configured to receive data in the communication system; a second producer port linked with a second consumer port through DMA; second dual hardware media access controls configured to consume the data assigned to the producer port; and at least one second processor configured to receive, via a second wireless interface, the data transmitted at the frequency of at least sixty Gigahertz. ### Claim 5 (depends on 4) The SoC device of claim 4, wherein the second wireless interface includes a second beamforming chip configured to transmit wireless communication signals to the wireless interface including the first beamforming chip. ### Claim 6 (depends on 5) The SoC device of claim 5, further comprising at least one antenna array, wherein each beamforming chip is arranged as part of the at least one antenna array. ### Claim 7 (depends on 5) The SoC device of claim 5, wherein each beamforming chip is configured to apply a beamforming gain of at least 23 decibels. ### Claim 8 (depends on 5) The SoC device of claim 5, wherein each beamforming chip is configured to transmit wireless communication signals at a frequency of at least 60 GHz. ### Claim 9 (depends on 4) The SoC device of claim 4, wherein the data received by the second interface includes radio over Ethernet (RoE) data. ### Claim 10 (depends on 1) The SoC device of claim 1, wherein the data received by the first interface includes enhanced common public radio interface (eCPRI) data received from an eCPRI field programmable gate array (FPGA). ### Claim 11 (depends on 1) The SoC device of claim 1, wherein the at least one processor is configured to establish control communication channels between a backhaul field programmable gate array (FPGA) and the SoC device through dedicated peripheral component interconnect express (PCIe) ports to central processing unit (CPU) consumer ports. ### Claim 12 (depends on 1) The SoC device of claim 1, wherein: the at least one processor is configured to handle lower MAC processes of the SoC device; and upper MAC processes reside on an application processor of a backhaul field programmable gate array (FPGA). ### Claim 13 (depends on 12) The SoC device of claim 12, wherein according to a ping-pong protocol, frames of data are sent out in a round-robin manner based on which MAC is able to access the wireless interface. ### Claim 14 (depends on 12) The SoC device of claim 12, wherein each radio channel stream is configured to operate according to the specified modulation rate which allows each MAC to independently request MAC protocol data unit (MPDU) payload from a shared memory space. ### Claim 15 A method of operating a system-on-chip (SoC) device for a communication system, the method comprising: receiving, via a first interface, data from in a communication system; assigning data received by the first interface to a producer port linked with a consumer port through direct memory access (DMA); consuming the data assigned to the producer port via dual hardware media access controls (MACs); and supplying the data to a wireless interface for transmission to another wireless communication device of the communication system at a frequency of at least sixty Gigahertz, wherein the wireless interface includes at least one beamforming chip configured to transmit wireless communication signals, wherein an aggregation layer of the SoC device is configured to synchronize the dual MACs and reassemble two independent MAC data streams into a single data stream, wherein the aggregation layer is configured to reorder out-of-order data frames using 802.11 protocol sequence numbers, committing only in-order frames to a next processing step and holding out-of-order data frames until they can be reordered or a timeout occurs; reducing a specified modulation rate in response to an out-of-order frame arrival rate increasing above a specified degradation threshold; and increasing the specified modulation rate in response to the out-of-order frame arrival rate decreasing below the specified degradation threshold. ### Claim 16 (depends on 15) The method of claim 15, wherein: receiving the data includes receiving the data at the first interface from a distributed unit of a fronthaul communication system architecture; and the distributed unit is in communication with a core network of the communication system. ### Claim 17 (depends on 15) The method of claim 15, wherein: receiving the data includes receiving the data at the first interface from a radio unit of a fronthaul communication system architecture; the radio unit is electrically coupled with at least one cellular antenna; and the radio unit is configured to transmit and receive wireless cellular signals. ### Claim 18 (depends on 15) The method of claim 15, wherein, the other wireless communication device includes: a second interface configured to receive data in the communication system; a second producer port linked with a second consumer port through DMA; second dual hardware media access controls configured to consume the data assigned to the producer port; and at least one second processor configured to receive, via a second wireless interface, the data transmitted at the frequency of at least sixty Gigahertz. ### Claim 19 (depends on 18) The method of claim 18, wherein the second wireless interface includes a second beamforming chip configured to transmit wireless communication signals to the wireless interface including the first beamforming chip. ### Claim 20 (depends on 15) The method of claim 15, wherein the data received by the first interface includes radio over Ethernet (RoE) data.