Back to results
US 12,712,822 B1Granted
FIFO bank selection
AssigneeMarvell Asia Pte Ltd
InventorsVijay Chougule, Ajit Kumar Jain
Life of this patent
Estimating the term…
Abstract
At a current clock cycle, a request is received for storing first-in-first-out (FIFO) buffer data portions in a FIFO buffer implemented with memory banks. In response to the request, memory bank selection methods are applied to select memory banks ordered in a first sequential order. It is determined whether the selected memory banks as ordered in the first sequential order starts with a first memory bank identical to a last memory bank written in a last clock cycle. IF SO, the first memory bank is swapped with a second memory bank immediately following the first memory bank in the first sequential order to generate a second sequential order. Writes is performed to store the FIFO buffer data portions into the selected memory banks in accordance with the second sequential order.
Claims21
A method comprising:
- at a current clock cycle, receiving a request for storing a set of first-in-first-out (FIFO) buffer data portions in a FIFO buffer implemented with a plurality of memory banks, wherein the plurality of memory banks includes a plurality of sets of memory entries;
- wherein each memory bank in the plurality of memory banks includes a respective set of memory entries in the plurality of sets of multiple memory entries;
- in response to the request for storing the set of FIFO buffer data portions, applying one or more memory bank selection methods to select, from among the plurality of memory banks, a set of memory banks ordered in a first sequential order;
- determining whether the set of memory banks as ordered in the first sequential order starts with a first memory bank identical to a last memory bank written in a last clock cycle, wherein the last clock cycle immediately precedes the current clock cycle, wherein a last sequential order used to order a last set of memory banks selected for a last set of writes in the last clock cycle ends with the last memory bank;
- in response to determining that the set of memory banks as ordered in the first sequential order starts with the first memory bank identical to the last memory bank written in the last clock cycle, performing:
- swapping the first memory bank with a second memory bank immediately following the first memory bank in the first sequential order to generate a second sequential order for the set of memory banks;
- performing a set of writes to store the plurality of FIFO buffer data portions into the set of memory banks in accordance with the second sequential order.
4 more elements
A system comprising:
- one or more computing devices;
- one or more non-transitory computer readable media storing instructions that, when executed by the one or more computing devices, cause performance of:
- at a current clock cycle, receiving a request for storing a set of first-in-first-out (FIFO) buffer data portions in a FIFO buffer implemented with a plurality of memory banks, wherein the plurality of memory banks includes a plurality of sets of memory entries;
- wherein each memory bank in the plurality of memory banks includes a respective set of memory entries in the plurality of sets of multiple memory entries;
- in response to the request for storing the set of FIFO buffer data portions, applying one or more memory bank selection methods to select, from among the plurality of memory banks, a set of memory banks ordered in a first sequential order;
- determining whether the set of memory banks as ordered in the first sequential order starts with a first memory bank identical to a last memory bank written in a last clock cycle, wherein the last clock cycle immediately precedes the current clock cycle, wherein a last sequential order used to order a last set of memory banks selected for a last set of writes in the last clock cycle ends with the last memory bank;
- in response to determining that the set of memory banks as ordered in the first sequential order starts with the first memory bank identical to the last memory bank written in the last clock cycle, performing:
- swapping the first memory bank with a second memory bank immediately following the first memory bank in the first sequential order to generate a second sequential order for the set of memory banks;
- performing a set of writes to store the plurality of FIFO buffer data portions into the set of memory banks in accordance with the second sequential order.
6 more elements
One or more non-transitory computer readable media storing instructions that, when executed by one or more computing devices, cause performance of:
- at a current clock cycle, receiving a request for storing a set of first-in-first-out (FIFO) buffer data portions in a FIFO buffer implemented with a plurality of memory banks, wherein the plurality of memory banks includes a plurality of sets of memory entries;
- wherein each memory bank in the plurality of memory banks includes a respective set of memory entries in the plurality of sets of multiple memory entries;
- in response to the request for storing the set of FIFO buffer data portions, applying one or more memory bank selection methods to select, from among the plurality of memory banks, a set of memory banks ordered in a first sequential order;
- determining whether the set of memory banks as ordered in the first sequential order starts with a first memory bank identical to a last memory bank written in a last clock cycle, wherein the last clock cycle immediately precedes the current clock cycle, wherein a last sequential order used to order a last set of memory banks selected for a last set of writes in the last clock cycle ends with the last memory bank;
- in response to determining that the set of memory banks as ordered in the first sequential order starts with the first memory bank identical to the last memory bank written in the last clock cycle, performing:
- swapping the first memory bank with a second memory bank immediately following the first memory bank in the first sequential order to generate a second sequential order for the set of memory banks;
- performing a set of writes to store the plurality of FIFO buffer data portions into the set of memory banks in accordance with the second sequential order.
4 more elements
Dependencies are inferred from the claim text.