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US 12,712,813 B2Granted
Packet processor memory reservation
AssigneeArista Networks, Inc.
InventorsAnirudh Ramesh Iyer, Lucas Maxime Frere, Pavan Krishnamurthy, Satish Kumar Selvaraj
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Abstract
A network device may include packet processor memory circuitry and processing circuitry coupled to the packet processor memory circuitry. The processing circuitry may receive a set of network traffic processing features for which data is to be stored in the packet processor memory and may receive memory reservation parameters for the set of network traffic processing features. Based on the received information, the processing circuitry may obtain and maintain memory reservation layout information for the set of features.
Claims20
A network device comprising:
- memory circuitry including a packet processor memory;
- a packet processor coupled to the packet processor memory and configured to process network traffic using the packet processor memory;
- and
- processing circuitry coupled to the memory circuitry and configured to:
- receive a plurality of network traffic processing features for which data is to be stored in the packet processor memory, the plurality of network traffic processing features including at least first and second network traffic processing features;
- obtain memory reservation parameters for the plurality of network traffic processing features;
- generate a memory reservation layout identifying memory portions of the packet processor memory to be reserved for the plurality of network traffic processing features based on the received memory reservation parameters, wherein at least a first memory portion, of the memory portions, to be reserved for the first network traffic processing feature includes one or more memory slices having a first width and wherein at least a second memory portion, of the memory portions, to be reserved for the second network traffic processing feature includes horizontally chained memory slices having a second width greater than the first width;
- and
- store the memory reservation layout in the memory circuitry.
6 more elements
A network device comprising:
- memory circuitry including a ternary content addressable memory (TCAM);
- a packet processor coupled to the TCAM and configured to process network traffic using the TCAM;
- and
- processing circuitry coupled to the memory circuitry and configured to:
- receive input containing network traffic processing features and memory reservation parameters associated with the network traffic processing features, the network traffic processing features including at least first and second network traffic processing features;
- generate a memory reservation layout on the TCAM for the network traffic processing features based on the received input, wherein the memory reservation layout is generated by allocating a first portion of the TCAM for the first network traffic processing feature prior to allocating a second portion of the TCAM for the second network traffic processing feature based on the first network traffic processing feature having a greater feature entry width than the second network traffic processing feature and wherein the first portion of the TCAM allocated for the first network traffic processing feature includes horizontally chained memory slices;
- and
- provide output based on the memory reservation layout, the output identifying one or more memory slices of the TCAM reserved for use by a given network traffic processing feature in the network traffic processing features.
5 more elements
A network device comprising:
- memory circuitry including a ternary content addressable memory (TCAM);
- a packet processor coupled to the TCAM and configured to process network traffic using the TCAM;
- and
- processing circuitry coupled to the memory circuitry and configured to:
- receive, from device management equipment, a plurality of network traffic processing features for which data is to be stored in the TCAM, the plurality of network traffic processing features including at least first and second network traffic processing features;
- obtain memory reservation parameters for the plurality of network traffic processing features;
- determine a combined scale of the plurality of network traffic processing features based at least in part on the memory reservation parameters;
- determine whether a memory reservation layout that includes a reserved memory portion on the TCAM for each network traffic processing feature in the plurality of network traffic processing features can be generated based on the combined scale of the plurality of network traffic processing features, wherein the memory reservation layout includes one or more memory slices to be reserved for the first network traffic processing feature and includes horizontally chained memory slices to be reserved for the second network traffic processing feature, wherein the one or more memory slices to be reserved for the first network traffic processing feature has a first width, and wherein the horizontally chained memory slices to be reserved for the second network traffic processing feature has a second width greater than the first width;
- and
- provide output based on the determination of whether the memory reservation layout can be generated.
7 more elements
Dependencies are inferred from the claim text.