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US 12,712,567 B2Granted
Sensor circuit
AssigneeInfineon Technologies AG
InventorsDan Ioan Dumitru Stoica, Ioan-Alexandru Nica
Life of this patent
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Abstract
The present disclosure relates to a sensor circuit including an analog chopper circuit configured to shift an analog input signal from an original frequency to a chopping frequency to generate a chopped analog signal, a ΣΔ-modulator coupled to an output of the analog chopper circuit and configured to digitize the chopped analog signal at a sampling frequency to generate a chopped digital signal, and a digital chopper circuit coupled to an output of the ΣΔ-modulator and configured to demodulate the chopped digital signal to generate a demodulated chopped digital signal having a signal component at the original frequency.
Claims18
A sensor circuit, comprising:
- an analog chopper circuit configured to shift an analog input signal from an original frequency to a chopping frequency to generate a chopped analog signal;
- a sigma-delta (ΣΔ)-modulator coupled to an output of the analog chopper circuit and configured to digitize the chopped analog signal at a sampling frequency to generate a chopped digital signal;
- and
- a digital chopper circuit coupled to an output of the ΣΔ-modulator and configured to demodulate the chopped digital signal to generate a demodulated chopped digital signal having a signal component at the original frequency,
- wherein a ratio between the sampling frequency of the ΣΔ-modulator and the chopping frequency is larger than 100.
2 more elements
A sensor circuit, comprising:
- an analog chopper circuit configured to shift an analog input signal from an original frequency to a chopping frequency to generate a chopped analog signal;
- a sigma-delta (ΣΔ)-modulator coupled to an output of the analog chopper circuit and configured to digitize the chopped analog signal at a sampling frequency to generate a chopped digital signal;
- and
- a digital chopper circuit coupled to an output of the ΣΔ-modulator and configured to demodulate the chopped digital signal to generate a demodulated chopped digital signal having a signal component at the original frequency,
- wherein the ΣΔ-modulator comprises a first multi-bit analog-to-digital converter (ADC) configured to convert the chopped analog signal from analog to digital to generate the chopped digital signal, and
- wherein the ΣΔ-modulator comprises a feedback path that extends from the output of the ΣΔ-modulator to an input of the ΣΔ-modulator, the feedback path comprising a second multi-bit DAC configured to convert the chopped digital signal back to analog.
3 more elements
A sensor circuit, comprising:
- an analog chopper circuit configured to shift an analog input signal from an original frequency to a chopping frequency to generate a chopped analog signal;
- a sigma-delta (ΣΔ)-modulator coupled to an output of the analog chopper circuit and configured to digitize the chopped analog signal at a sampling frequency to generate a chopped digital signal;
- and
- a digital chopper circuit coupled to an output of the ΣΔ-modulator and configured to demodulate the chopped digital signal to generate a demodulated chopped digital signal having a signal component at the original frequency,
- wherein the ΣΔ-modulator comprises a single-bit analog-to-digital converter (ADC) configured to convert the chopped analog signal from analog to digital to generate the chopped digital signal, and
- wherein the ΣΔ-modulator comprises a feedback path that extends from the output of the ΣΔ-modulator to an input of the ΣΔ-modulator, the feedback path comprising a single-bit digital-to-analog converter (DAC) configured to convert the chopped digital signal back to analog.
3 more elements
A sensor circuit, comprising:
- an analog chopper circuit configured to shift an analog input signal from an original frequency to a chopping frequency to generate a chopped analog signal;
- a sigma-delta (ΣΔ)-modulator coupled to an output of the analog chopper circuit and configured to digitize the chopped analog signal at a sampling frequency to generate a chopped digital signal;
- a digital chopper circuit coupled to an output of the ΣΔ-modulator and configured to demodulate the chopped digital signal to generate a demodulated chopped digital signal having a signal component at the original frequency;
- and
- a digital filter coupled between the ΣΔ-modulator and the digital chopper circuit and configured to reject harmonics of the chopping frequency.
2 more elements
Dependencies are inferred from the claim text.