Oversampling single-ended SAR DAC with reference ripple cancellation
AssigneeNXP USA, Inc.
InventorMichael Todd Berens
Life of this patent
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Abstract
A method for reference ripple cancellation in an oversampled single-ended Successive Approximation Register (SAR) Analog to Digital Converter (ADC) includes sampling an input voltage onto a plurality of first capacitors of a switching Digital to Analog Converter (DAC) during a sampling phase. A first output of the switching DAC is compared to a second output of a non-switching DAC during a first conversion phase. A first digital code is generated from the comparison of the first output to the second output. The first digital code is applied to the non-switching DAC during a second conversion phase subsequent to the first conversion phase.
Claims20
A method for reference ripple cancellation in an oversampled single-ended Successive Approximation Register (SAR) Analog to Digital Converter (ADC) comprising:
- sampling an input voltage onto a plurality of first capacitors of a switching Digital to Analog Converter (DAC) during a first sampling phase;
- comparing a first output of the switching DAC to a second output of a non-switching DAC during a first conversion phase;
- generating a first digital code from the comparison of the first output to the second output;
- and
- applying the first digital code to the non-switching DAC during a second conversion phase subsequent to the first conversion phase.
An apparatus comprising:
- a non-switching Digital to Analog Converter (DAC);
- a switching DAC, configured to sample an input voltage onto a plurality of first binary weighted capacitors during a first sampling phase;
- a comparator configured to compare a first output of the switching DAC to a second output of a non-switching DAC during a first conversion phase;
- and
- a Successive Approximation Register (SAR) logic circuit, configured to generate a digital code from the comparison of the first output to the second output, and to apply the digital code to the non-switching DAC during a second conversion phase subsequent to the first conversion phase.
A method for reference ripple cancellation in an oversampled single-ended Successive Approximation Register (SAR) Analog to Digital Converter (ADC) comprising:
- comparing a first output of a switching Digital to Analog Converter (DAC) to a second output of a non-switching DAC during a current conversion phase;
- generating a digital code from the comparison of the first output to the second output by successively approximating an input voltage with a plurality of first binary weighted capacitors of the switching DAC, switchably connected to one of a high reference voltage and a low reference voltage;
- and
- applying the digital code to the non-switching DAC during a subsequent conversion phase, subsequent to the current conversion phase.
Dependencies are inferred from the claim text.