Dynamic voltage scaling for asynchronous analog to digital converters

An apparatus comprising:

• A first asynchronous ADC configured to receive an analog input signal and to convert the analog input signal to a digital output signal, the asynchronous ADC configured to initiate the conversion according to a first clock cycle and to output a done signal upon completion of the conversion, the first asynchronous ADC configured with a supply voltage high enough that the done signal is asserted prior to a next clock cycle with a predetermined probability;
• a timing margin sensor comprising a programmable delay unit configured to generate a delayed done signal having a reduced timing margin;
• and
• a dynamic voltage scaling controller configured to measure an error rate of the delayed done signal according to the next clock cycle, and to adjust the supply voltage provided to the first asynchronous ADC responsive to the measured error rate deviating from a known error rate by a predetermined threshold.